System and method for handling data requests

• US 7,949,830 B2
• Filed: 12/10/2007
• Issued: 05/24/2011
• Est. Priority Date: 12/10/2007
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Trombley, Michael Raymond, Allen, James Johnson Jr., Jenkins, Steven Kenneth, Mossman, James A.
• Primary Examiner(s): Krofcheck; Michael C
• Application Number:
  US11/953,255
• Publication Number:
  US 20090150622A1
• Time in Patent Office: 1,261 Days
• Field of Search: None
• US Class Current: 711/137
• CPC Class Codes: G06F 12/0806 Multiuser, multiprocessor or multiprocessing cache systems
• CPC Class Codes: G06F 12/0859 with reload from main memory
• CPC Class Codes: G06F 2212/1021 Hit rate improvement
• CPC Class Codes: G06F 2212/507 using speculative control

Abstract

A system and method for handling speculative read requests for a memory controller in a computer system are provided. In one example, a method includes the steps of providing a speculative read threshold corresponding to a selected percentage of the total number of reads that can be speculatively issued, and intermixing demand reads and speculative reads in accordance with the speculative read threshold. In another example, a computer system includes a CPU, a memory controller, memory, a bus connecting the CPU, memory controller and memory, circuitry for providing a speculative read threshold corresponding to a selected percentage of the total number of reads that can be speculatively issued, and circuitry for intermixing demand reads and speculative reads in accordance with the speculative read threshold. In another example, a method includes the steps of providing a speculative dispatch time threshold corresponding to a selected percentage of a period of time required to search a cache of the computer system, and intermixing demand reads and speculative reads in accordance with the speculative dispatch time threshold.

Claims

1. A method for handling speculative read requests for a memory controller in a computer system comprising the steps of:

providing a speculative read threshold corresponding to a selected percentage of a total number of reads to be speculatively issued;

intermixing demand reads and speculative reads in accordance with the speculative read threshold; and

determining the speculative read threshold based on a percentage of read requests that pass coherency checking and require data from the memory controller.

2. The method of claim 1, further comprising the steps of:

monitoring a selected computer system state; and

dynamically adjusting the speculative read threshold based on the selected computer system state.

3. The method of claim 2, further comprising the step of preventing a read request from dispatching as a speculative read request if a percentage of current memory controller resources being used for speculative reads is equal to or greater than the speculative read threshold.

4. The method of claim 3, further comprising the step of preventing the read from dispatching as a speculative read if the memory controller is full.

5. The method of claim 4, further comprising the step of preventing the read from dispatching as a speculative read if a time elapsed from when the memory controller receives the read request to when the memory controller has available resources is greater than a speculative dispatch time threshold.

6. The method of claim 5, further comprising the step of providing the speculative dispatch time threshold as a selected percentage of a period of time required to search a cache of the computer system.

7. The method of claim 6, further comprising the step of preventing the read request from dispatching as a speculative read if the read request is not a youngest available read request.

8. A computer system comprising

a CPU;

a memory controller;

memory;

a bus connecting the CPU, memory controller and memory;

circuitry for providing a speculative read threshold corresponding to a selected percentage of a total number of reads that can be speculatively issued;

circuitry for intermixing demand reads and speculative reads in accordance with the speculative read threshold; and

circuitry for determining the speculative read threshold based on a percentage of read requests that pass coherency checking and require data from the memory controller.

9. The computer system of claim 8, further comprising:

circuitry for monitoring a selected computer system state; and

circuitry for dynamically adjusting the speculative read threshold based on the selected computer system state.

10. The computer system of claim 9, further comprising circuitry for preventing a read request from dispatching as a speculative read request if a percentage of current memory controller resources being used for speculative reads is equal to or greater than the speculative read threshold.

11. The computer system of claim 10, further comprising circuitry for preventing the read from dispatching as a speculative read if the memory controller is full.