Insulated gate-type semiconductor device and manufacturing method thereof

• US 7,972,928 B2
• Filed: 06/02/2006
• Issued: 07/05/2011
• Est. Priority Date: 06/03/2005
• Status: Expired due to Fees

• Current Assignee: DENSO Corporation
• Original Assignee: Toyota Jidosha Kabushiki Kaisha (Toyota Motor Corporation)
• Inventors: Hisanaga, Yukihiro
• Primary Examiner(s): MATTHEWS, COLLEEN ANN
• Application Number:
  US11/445,206
• Publication Number:
  US 20060273387A1
• Time in Patent Office: 1,859 Days
• Field of Search: 257/E21.17, 257/E21.384, 257/E21.41, 257/330, 438/270, 438/287
• US Class Current: 438/270
• CPC Class Codes: H01L 29/66333 Vertical insulated gate bipolar transistors
• CPC Class Codes: H01L 29/7395 Vertical transistors, e.g. vertical IGBT

Abstract

This invention has a purpose to provide an insulated gate-type semiconductor device and its manufacturing method in which a decrease in gate insulation dielectric strength voltage and a reduction in manufacturing costs are both achieved. First, (a) a CZ bulk substrate is prepared. Next, (b) P⁻ diffused layer and N⁺ diffused layer 31 are formed by executing processes such as ion implantation and thermal diffusion treatment. Further (c) a gate trench is formed by reactive ion etching. Next, (d) a gate insulation film containing carbon of 1.0×10¹⁸ atoms/cm³ is formed on the wall face of a gate trench according to a CVD method and, annealing is subsequently performed. As a consequence, a low defect area is formed in the vicinity of an interface between the CZ bulk substrate and the gate insulation film.

Claims

1. A manufacturing method of an insulated gate type semiconductor device, comprising:

forming a silicon substrate having a surface with no epitaxial layer;

forming a gate trench in the silicon substrate;

forming on both the surface of the silicon substrate and on a surface of the gate trench a gate insulation film having a carbon content of more than 1.0×

10¹⁷ atoms/cm³, wherein the gate insulation film directly contacts the surface of the silicon substrate, and the surface of the trench;

depositing a gate material within the gate trench;

annealing the silicon substrate on which the insulation film has been formed, at a temperature of 900°

C. or higher, wherein the annealing induces a reduction reaction of the carbon in the gate insulation film, and wherein oxygen precipitate is removed from the gate insulation film.

2. The manufacturing method of an insulated gate-type semiconductor device according to claim 1,

wherein the gate insulation film is formed according to a chemical vapor growth method (a CVD method) with a carbon organic material used as a material gas.

3. The method of claim 1, wherein the silicon substrate is a Czochralski (CZ) substrate.

4. The method of claim 1, further comprising forming a diffused layer on the surface of the silicon substrate by ion implantation or thermal diffusion.

5. A manufacturing method of an insulated gate-type semiconductor device, comprising:

forming a silicon substrate having a surface with no epitaxial layer;

forming a gate trench in the silicon substrate;

forming on both the surface of the silicon substrate and on a surface of the gate trench a gate insulation film having a higher concentration of carbon than an oxygen concentration of the silicon substrate, wherein the gate insulation film directly contacts the surface of the silicon substrate, and the surface of the trench;

depositing a gate material within the gate trench;

annealing the silicon substrate on which the insulation film has been formed, at a temperature of 900°

C. or higher, wherein the annealing induces a reduction reaction of the carbon in the gate insulation film, and wherein oxygen precipitate is removed from the gate insulation film.

6. The manufacturing method of an insulated gate-type semiconductor device according to claim 5, wherein the gate insulation film is formed according to a chemical vapor growth method (a CVD method) with a carbon organic material used as a material gas.

7. The method of claim 5, wherein the silicon substrate is a Czochralski (CZ) substrate.

8. The method of claim 5, further comprising forming a diffused layer on the surface of the silicon substrate by ion implantation or thermal diffusion.

9. A manufacturing method of an insulated gate type semiconductor device, comprising:

preparing a silicon substrate having a surface with no epitaxial layer;

forming on both the surface of the silicon substrate and on a surface of a gate trench a gate insulation film having a carbon content of more than 1.0×

10¹⁷ atoms/cm³, wherein the gate insulation film directly contacts the surface of the silicon substrate, and the surface of the trench;

depositing a gate material within the gate trench;

annealing the silicon substrate on which the insulation film has been formed, at a temperature of 900°

C. or higher, wherein the annealing induces a reduction reaction of the carbon in the gate insulation film, and wherein oxygen precipitate is removed from the gate insulation film.

10. The manufacturing method of claim 9, wherein the silicon substrate is a Czochralski (CZ) substrate.

11. The method of claim 9, further comprising forming a diffused layer on the surface of the silicon substrate by ion implantation or thermal diffusion.

12. A manufacturing method of an insulated gate-type semiconductor device, comprising:

preparing a silicon substrate having a surface with no epitaxial layer;

forming on both the surface of the silicon substrate and on a surface of a gate trench a gate insulation film having a higher concentration of carbon than an oxygen concentration of the silicon substrate, wherein the gate insulation film directly contacts the surface of the silicon substrate, and the surface of the trench;

depositing a gate material within the gate trench;

annealing the silicon substrate on which the insulation film has been formed, at a temperature of 900°

C. or higher, wherein the annealing induces a reduction reaction of the carbon in the gate insulation film, and wherein oxygen precipitate is removed from the gate insulation film.

13. The manufacturing method of claim 12, wherein the silicon substrate is a Czochralski (CZ) substrate.

14. The method of claim 12, further comprising forming a diffused layer on the surface of the silicon substrate by ion implantation or thermal diffusion.