Conductive bus structure for interferometric modulator array

• US 7,982,700 B2
• Filed: 10/19/2007
• Issued: 07/19/2011
• Est. Priority Date: 09/27/2004
• Status: Expired due to Fees

• Current Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Original Assignee: Qualcomm MEMS Technologies Incorporated (Qualcomm, Inc.)
• Inventors: Chui, Clarence, Sampsell, Jeffrey B.
• Primary Examiner(s): Nguyen; Kevin M
• Application Number:
  US11/875,613
• Publication Number:
  US 20080080043A1
• Time in Patent Office: 1,369 Days
• Field of Search: 345/85, 345/108
• US Class Current: 345/85
• CPC Class Codes: B81B 3/0086 Electrical characteristics, e.g. reducing driving voltage, improving resistance to peak voltage
• CPC Class Codes: G02B 26/001 based on interference in an adjustable optical cavity interference filters G02B5/28; devices or arrangements using multiple reflections in spectrometry or monochromators G01J3/26
• CPC Class Codes: G09G 3/3466 based on interferometric effect
• CPC Class Codes: Y10T 29/49117 Conductor or circuit manufacturing

Abstract

Embodiments of an interferometric modulator are disclosed having various enhancements and features including a conductive bus. In certain embodiments, the interferometric modulator has a first conductive layer suspended over a second electrode layer. In certain embodiments, a second conductive layer is provided over the first conductive layer. One of the first and/or second conductive buses may further connect to the first electrode layer and/or the second electrode layer. Other disclosed features can be incorporated into embodiments of the interferometric modulator to improve response time, power consumption, and image resolution.

Claims

1. A device comprising:

a substrate;

a first electrode layer over the substrate, the first electrode layer having a first electrical resistance;

a second electrode layer over the substrate, the second electrode layer having a second electrical resistance;

a movable layer; and

a conductive bus layer having a third electrical resistance lower than the first electrical resistance or the second electrical resistance, at least a portion of the conductive bus layer electrically coupled to at least one of the first electrode layer and the second electrode layer.

2. The device of claim 1, wherein the conductive bus layer comprises a conductive metal.

3. The device of claim 1, wherein the conductive bus layer comprises a composite alloy.

4. The device of claim 1, wherein the conductive bus layer comprises aluminum, chromium, titanium, or nickel.

5. The device of claim 1, wherein the conductive bus layer has a thickness between 0.1 micron and 2 microns.

6. The device of claim 1, wherein the conductive bus layer has a thickness between 4 microns and 10 microns.

7. The device of claim 1, wherein the first electrode layer has a thickness between 300 angstroms and 2,000 angstroms.

8. The device of claim 1, further comprising:

a display;

a processor configured to communicate with said display, said processor being configured to process image data; and

a memory device configured to communicate with said processor.

9. The device of claim 8, further comprising a driver circuit configured to send at least one signal to the display.

10. The device of claim 9, further comprising a controller configured to send at least a portion of the image data to the driver circuit.

11. The device of claim 8, further comprising an image source module configured to send said image data to said processor.

12. The device of claim 11, wherein the image source module comprises at least one of a receiver, transceiver, and transmitter.

13. The device of claim 8, further comprising an input device configured to receive input data and to communicate said input data to said processor.

14. A device comprising:

means for supporting at least a portion of the device;

first means for conducting electricity over the supporting means, the first conducting means having a first electrical resistance;

second means for conducting electricity over the supporting means, the second conducting means having a second electrical resistance;

means for moving at least a portion of the device; and

third means for conducting electricity, the third conducting means having a third electrical resistance lower than the first electrical resistance or the second electrical resistance, at least a portion of the third conducting means electrically coupled to at least one of the first conducting means and the second conducting means.

15. The device of claim 14, wherein the first conductive means comprises a first electrode layer.

16. The device of claim 14, wherein the second conductive means comprises a second electrode layer.

17. The device of claim 14, wherein the means for moving comprises a movable layer.

18. The device of claim 14, wherein the third conductive means comprises a conductive bus layer.

19. A device comprising:

a plurality of structures, each structure comprising a first electrode layer having a first electrical resistance and a first electrical conductance, a second electrode layer having a second electrical resistance and a second electrical conductance, and a surface substantially parallel to the first electrode layer and coupled to the second electrode layer, the first electrode layer and the second electrode layer having a region therebetween, the surface responsive to a voltage applied to at least one of the first electrode layer and the second electrode layer by moving within the region along a direction substantially perpendicular to the surface; and

a conductive bus layer interconnecting the plurality of structures, at least a portion of the conductive bus layer electrically coupled to the first electrode layers or the second electrode layers of the plurality of structures, wherein the conductive bus layer is configured to reduce a resistance-capacitance time constant between a driver and the device as compared to a device having serially connected electrode layers.

20. The device of claim 19, wherein the conductive bus layer has a third electrical resistance lower than the first electrical resistance or the second electrical resistance.

21. The device of claim 19, wherein the conductive bus layer has a third electrical conductance greater than the first electrical conductance or the second electrical conductance.

22. A device comprising:

a plurality of optical modulators, each optical modulator comprising a first electrode layer, a second electrode layer, and a reflective surface substantially parallel to the first electrode layer and coupled to the second electrode layer, the first electrode layer and the second electrode layer having a region therebetween, the reflective surface responsive to a voltage applied to at least one of the first electrode layer and the second electrode layer by moving within the region along a direction substantially perpendicular to the reflective surface; and

a conductive bus layer interconnecting the plurality of optical modulators, at least a portion of the conductive bus layer electrically coupled to the first electrode layers or the second electrode layers of the plurality of optical modulators, wherein the conductive bus layer is configured to avoid interference with an optical performance of the device.