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Semiconductor nanowire with built-in stress

  • US 7,989,233 B2
  • Filed: 01/11/2011
  • Issued: 08/02/2011
  • Est. Priority Date: 04/03/2009
  • Status: Expired due to Fees
First Claim
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1. A method of forming a semiconductor structure comprising:

  • forming a semiconductor nanowire on a substrate, wherein said semiconductor nanowire is adjoined to a first semiconductor pad and a second semiconductor pad, and wherein said semiconductor nanowire is suspended over said substrate;

    inducing longitudinal strain in a middle portion of said semiconductor nanowire by forming a first stress-generating material portion on said first semiconductor pad and a second stress-generating material portion on said second semiconductor pad;

    forming a gate dielectric directly on said middle portion of said semiconductor nanowire while said middle portion is under said longitudinal strain; and

    removing said first stress-generating material portion and said second stress-generating material portion, wherein said middle portion of said semiconductor nanowire is longitudinally strained after removal of said first stress-generating material portion and said second stress-generating material portion.

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