Electrical device using phase change material, phase change memory device using solid state reaction and method for fabricating the same

• US 7,989,793 B2
• Filed: 12/02/2008
• Issued: 08/02/2011
• Est. Priority Date: 12/10/2007
• Status: Active Grant

• Current Assignee: Electronics and Telecommunications Research Institute
• Original Assignee: Electronics and Telecommunications Research Institute
• Inventors: Jung, Soon Won, Yoon, Sung Min, Yu, Byoung Gon, Park, Young Sam, Lee, Seung Yun
• Primary Examiner(s): Dickey; Thomas L
• Assistant Examiner(s): YUSHIN, NIKOLAY K
• Application Number:
  US12/326,776
• Publication Number:
  US 20090146128A1
• Time in Patent Office: 973 Days
• Field of Search: 257/2, 257/3, 257/4, 257/5, 257/E45.002, 257/246, 257/248, 257/616, 365/163
• US Class Current: 257/2
• CPC Class Codes: H10N 70/021 Formation of the switching material, e.g. layer deposition
• CPC Class Codes: H10N 70/061 Patterning of the switching material
• CPC Class Codes: H10N 70/231 based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
• CPC Class Codes: H10N 70/826 adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
• CPC Class Codes: H10N 70/8828 Tellurides, e.g. GeSbTe
• CPC Class Codes: H10N 70/884 Other compounds of groups 13-15, e.g. elemental or compound semiconductors

Abstract

Provided are a nonvolatile memory device and a method of fabricating the same, in which a phase-change layer is formed using a solid-state reaction to reduce a programmable volume, thereby lessening power consumption. The device includes a first reactant layer, a second reactant layer formed on the first reactant layer, and a phase-change layer formed between the first and second reactant layers due to a solid-state reaction between a material forming the first reactant layer and a material forming the second reactant layer. The phase-change memory device consumes low power and operates at high speed.

Claims

1. An electrical device using a phase-change material comprising:

a first reactant layer, the first reactant layer being a first pre-cursor of phase-change material;

a second reactant layer formed on the first reactant layer, the second reactant layer being a second pre-cursor of the phase-change material; and

a phase-change layer formed of the phase-change material which is formed between the first and second reactant layers due to a solid-state reaction between a portion of the first reactant layer and a portion of the second reactant layer,

wherein each of the first and the second reactant layers alone cannot function as phase-change material.

2. The device according to claim 1, wherein the phase-change layer is formed of a material that is reversibly switched between crystalline and amorphous phases according to the amount of applied current.

3. The device according to claim 1, wherein at least one of the first and second reactant layers is formed of one selected from the group consisting of silicon (Si), germanium (Ge), antimony (Sb), and a chalcogen.

4. The device according to claim 3, wherein a stack structure of the first and second reactant layers is selected from the group consisting of Ge/Sb, Sb/Ge, Ge/Te, Te/Ge, Sb/Te, and Te/Sb.

5. A phase-change memory device comprising:

a first reactant layer;

an insulating layer covering the first reactant layer having a contact hole formed therein partially exposing a top surface of the first reactant layer; and

a second reactant layer filling the contact hole,

wherein a phase-change layer is formed between the first and second reactant layers due to a solid-state reaction between a material forming the first reactant layer and a material forming the second reactant layer.

6. The device according to claim 5, wherein the phase-change layer is formed of a material that is reversibly switched between crystalline and amorphous phases according to the amount of applied current.

7. The device according to claim 5, wherein at least one of the first and second reactant layers is formed of one selected from the group consisting of silicon(Si), germanium(Ge), antimony (Sb), a chalcogen, and a combination thereof

8. The device according to claim 5, wherein each of the first and second reactant layers has one stack structure selected from the group consisting of Ge/Sb, Sb/Ge, Ge/Te, Te/Ge, Sb/Te, Te/Sb, Ge/SbTe, SbTe/Ge, SiGe/SbTe, and SbTe/SiGe.

9. A phase-change memory device comprising:

an insulating layer formed over a lower electrode, and having a contact hole partially exposing the lower electrode;

a first reactant layer filling the contact hole, the first reactant layer being formed of a first pre-cursor of phase-change material;

a second reactant layer formed over the first reactant layer, the second reactant layer being formed of a second pre-cursor of the phase-change material; and

a phase-change layer formed of the phase-change material which is formed between the first and second reactant layers due to a solid-state reaction between the first cursor forming of the first reactant layer and the second cursor forming of the second reactant layer,

wherein each of the first and the second reactant layers alone cannot function as phase-change material.

10. The device according to claim 9, wherein the phase-change layer is formed of a material that is reversibly switched between crystalline and amorphous phases.

11. The device according to claim 10, wherein at least one of the first and second reactant layers is formed of one selected from the group consisting of silicon (Si), germanium (Ge), antimony (Sb), and a chalcogen.

12. The device according to claim 11, wherein a stack of the first and second reactant layers is selected from the group consisting of Ge/Sb, Sb/Ge, Ge/Te, Te/Ge, Sb/Te, and Te/Sb.