Data writing method for non-volatile memory and controller using the same

• US 8,001,317 B2
• Filed: 02/04/2008
• Issued: 08/16/2011
• Est. Priority Date: 10/19/2007
• Status: Active Grant

• Current Assignee: Phison Electronics Corporation
• Original Assignee: Phison Electronics Corporation
• Inventors: Yeh, Chih-Kang, Chu, Chien-Hua, Fu, Jia-Yi
• Primary Examiner(s): Ellis; Kevin L
• Assistant Examiner(s): Bertram; Ryan
• Application Number:
  US12/025,485
• Publication Number:
  US 20090106484A1
• Time in Patent Office: 1,289 Days
• Field of Search: 711/103, 711/173
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1032 Reliability improvement, data loss prevention, degraded operation etc
• CPC Class Codes: G06F 2212/7203 Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
• CPC Class Codes: G06F 2212/7207 management of metadata or control data

Abstract

A data writing method for a non-volatile memory is provided, wherein the non-volatile memory includes a data area and a spare area. In the data writing method, a plurality of blocks in a substitution area of the non-volatile memory is respectively used for substituting a plurality of blocks in the data area, wherein data to be written into the blocks in the data area is written into the blocks in the substitution area, and the blocks in the substitution area are selected from the spare area of the non-volatile memory. A plurality of temporary blocks of the non-volatile memory is used as a temporary area of the blocks in the substitution area, wherein the temporary area is used for temporarily storing the data to be written into the blocks in the substitution area.

Claims

1. A data writing method for a non-volatile memory, comprising:

respectively using a plurality of blocks belonging to a substitution area of the non-volatile memory for substituting a plurality of blocks belonging to a data area of the non-volatile memory to building a plurality of mother-child blocks sets, wherein each of the mother-child blocks sets includes one block belonging to the data area and one block belonging to the substitution area, and the blocks belonging to the substitution area are selected from a spare area of the non-volatile memory;

using a plurality of temporary blocks of the non-volatile memory as a temporary area for the plurality of mother-child blocks sets, wherein each of the temporary blocks does not independently belong to any one of the mother-child blocks sets,

receiving new data to be written into the blocks belonging to the data area;

determining whether the new data to be written is in a random mode;

writing the new data into the blocks belonging to the substitution area if the new data to be written is not in the random mode; and

writing the new data into the temporary blocks belonging to the temporary area if the new data to be written is in the random mode.

2. The data writing method according to claim 1, wherein the non-volatile memory comprises a replacement area, and at least one of the temporary blocks is selected from the replacement area.

3. The data writing method according to claim 1, wherein when the blocks belonging to the substitution area are attached right after where data is previously recorded for recording continuous write-back data, related data is written into the temporary area.

4. The data writing method according to claim 1 further comprising using a temporary table for indicating valid data and invalid data in the temporary area and a mapping relationship between pages in the temporary area and pages in the blocks belonging to the substitution area.

5. The data writing method according to claim 1, wherein if the flash memory is a MLC NAND flash memory, only lower pages in the temporary blocks are used for writing data into the temporary area, wherein the write speed of the lower pages is faster than the write speed of upper pages in the temporary blocks.

6. The data writing method according to claim 1, wherein if the flash memory is a MLC NAND flash memory, only the pages having the fastest write speed or highest reliability in the temporary blocks are used for writing data into the temporary area.

10. The controller according to claim 1, wherein when the blocks belonging to the substitution area are attached right after where data is previously recorded for recording continuous write-back data, related data is written into the temporary area.

7. A controller, comprising:

a microprocessor unit, for controlling the operation of the controller;

a non-volatile memory interface, electrically connected to the microprocessor unit and used for accessing the non-volatile memory;

a buffer memory, electrically connected to the microprocessor unit and used for temporarily storing data; and

a memory management module, electrically connected to the microprocessor unit and used for managing the non-volatile memory,

wherein the memory management module respectively uses a plurality of blocks belonging to a substitution area of the non-volatile memory for substituting a plurality of blocks belonging to a data area of the non-volatile memory to building a plurality of mother-child blocks sets, wherein each of the mother-child blocks sets includes one block belonging to the data area and one block belonging to the substitution area, and the blocks belonging to the substitution area are selected from a spare area of the non-volatile memory, and

wherein the memory management module uses a plurality of temporary blocks of the non-volatile memory as a temporary area for the plurality of mother-child blocks sets, wherein each of the temporary blocks does not independently belong to any one of the mother-child blocks sets,

wherein the memory management module receives new data to be written into the blocks belonging to the data area, and the memory management module further determines whether the new data to be written is in a random mode,

wherein the memory management module writes the new data into the blocks belonging to the substitution area if the new data to be written is not in the random mode, and

wherein the memory management module writes the new data into the temporary blocks belonging to the temporary area if the new data to be written is in the random mode.

8. The controller according to claim 7, wherein the non-volatile memory comprises a replacement area, and at least one of the temporary blocks is selected from the replacement area.

9. The controller according to claim 8, wherein the memory management module uses a temporary table for indicating valid data and invalid data in the temporary area and a mapping relationship between pages in the temporary area and pages in the blocks belonging to the substitution area.

11. The controller according to claim 7, wherein the non-volatile memory is a SLC NAND flash memory or a MLC NAND flash memory.

12. The controller according to claim 11, wherein if the flash memory is the MLC NAND flash memory, the memory management module only uses lower pages in the temporary blocks for writing data into the temporary area, wherein the write speed of the lower pages is faster than the write speed of upper pages in the temporary blocks.