Battery backup system with sleep mode
First Claim
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1. An apparatus comprising:
- a charger circuit configured to generate a first power down control signal and a second power down control signal in response to (i) a first charge signal, (ii) a second charge signal, (iii) a supply voltage, and (iv) a host control signal; and
a control circuit configured to generate said first charge signal and said second charge signal in response to a first battery signal and a second battery signal, wherein (A) (i) said apparatus enters a power down state in response to said host control signal initiating said power down state, (ii) said control circuit enters a sleep mode in said power down state and (iii) said control circuit disconnects operating power from said charger circuit in said power down state, (B) said charger circuit receives power from (i) said supply voltage when said apparatus is in a first mode, and (ii) at least one of said first charge signal and said second charge signal when said apparatus is in a second mode, (C) said control circuit monitors a remaining battery charge of said first battery signal and said second battery signal according to a first checking protocol when said apparatus is in said first mode, and (D) said control circuit monitors said remaining battery charge of said first battery signal and said second battery signal according to a second checking protocol when said apparatus is in said power down state, wherein said second checking protocol uses less power than said first checking protocol.
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Abstract
The present invention concerns an apparatus comprising a charger circuit and a control circuit. The charger circuit may be configured to generate a first power down control signal and a second power down control signal in response to (i) a first charge signal, (ii) a second charge signal, (iii) a supply voltage, and (iv) a host control signal. The control circuit may be configured to generate the first charge signal and the second charge signal in response to a first battery signal and a second battery signal. The control circuit may enter a power down state in response to the host control signal initiating the power down state.
15 Citations
16 Claims
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1. An apparatus comprising:
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a charger circuit configured to generate a first power down control signal and a second power down control signal in response to (i) a first charge signal, (ii) a second charge signal, (iii) a supply voltage, and (iv) a host control signal; and a control circuit configured to generate said first charge signal and said second charge signal in response to a first battery signal and a second battery signal, wherein (A) (i) said apparatus enters a power down state in response to said host control signal initiating said power down state, (ii) said control circuit enters a sleep mode in said power down state and (iii) said control circuit disconnects operating power from said charger circuit in said power down state, (B) said charger circuit receives power from (i) said supply voltage when said apparatus is in a first mode, and (ii) at least one of said first charge signal and said second charge signal when said apparatus is in a second mode, (C) said control circuit monitors a remaining battery charge of said first battery signal and said second battery signal according to a first checking protocol when said apparatus is in said first mode, and (D) said control circuit monitors said remaining battery charge of said first battery signal and said second battery signal according to a second checking protocol when said apparatus is in said power down state, wherein said second checking protocol uses less power than said first checking protocol. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An apparatus comprising:
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means for generating a first power down control signal and a second power down control signal in response to (i) a first charge signal, (ii) a second charge signal, (iii) a supply voltage, and (iv) a host control signal; and means for generating said first charge signal and said second charge signal in response to a first battery signal and a second battery signal, wherein (i) said apparatus enters a power down state in response to said host control signal initiating said power down state, (ii) said means for generating said first charge signal and said second charge signal enters a sleep mode in said power down state and (iii) said means for generating said first charge signal and said second charge signal disconnects operating power from said means for generating said first power down control signal and said second power down control signal in said power down state and (C) said apparatus is further configured to (i) control charging and discharging of said first battery by generating a plurality of first control signals on a first bus, (ii) control said charge and a discharge of said second battery by generating a plurality of second control signals on a second bus, (iii) draw an operating power from any available among a main power source, said first battery and said second battery and (iv) release both said first bus and said second bus when said operating power is unavailable.
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9. An apparatus comprising:
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an input circuit configured to generate a simulated power supply signal having an enabled state and a disabled state in response to a main power source and a host control signal received from a host bus; and a charger circuit configured to avoid a power not good condition that disables operation of said charger circuit when said simulated power supply signal is in said enabled state, wherein (A) said charger circuit (i) is configured to charge a first battery and a second battery when said main power source is present, and (ii) protects an over voltage condition of said main power source from damaging said host bus, (B) said power not good condition occurs when initializing a power up sequence of said apparatus with said first battery unavailable, said second battery unavailable and said simulated power supply signal in said disabled state and (C) said charger circuit is further configured to (i) control said charge and a discharge of said first battery by generating a plurality of first control signals on a first bus, (ii) control said charge and a discharge of said second battery by generating a plurality of second control signals on a second bus, (iii) draw an operating power from any available among said main power source, said first battery and said second battery and (iv) release both said first bus and said second bus when said operating power is unavailable. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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Specification