Methods and systems for automatically renaming logical Circuit identifiers for rerouted logical circuits in a data network

• US 8,031,588 B2
• Filed: 09/30/2009
• Issued: 10/04/2011
• Est. Priority Date: 12/23/2003
• Status: Expired due to Term

• Current Assignee: Rakuten Group, Inc.
• Original Assignee: AT&T Intellectual Property I LP (AT&T, Inc.)
• Inventors: Taylor, William, Massengill, David, Hollingsworth, John
• Primary Examiner(s): Rao, Seema S.
• Assistant Examiner(s): ANDREWS, LEON T
• Application Number:
  US12/570,938
• Publication Number:
  US 20100020677A1
• Time in Patent Office: 734 Days
• Field of Search: None
• US Class Current: 370/216
• CPC Class Codes: H04L 12/14 Charging , metering or billing arrangements for data wireline or wireless communications

Abstract

A disclosed example method involves identifying a first logical circuit identifier for a first logical circuit in a first network. When a failure is detected in the first logical circuit, a second logical circuit identifier for a second logical circuit in a failover network separate from the first network is identified and the first logical circuit is renamed without manual intervention to identify the first logical circuit using the second logical circuit identifier. The second logical circuit is to reroute data from the first logical circuit.

Claims

1. A method comprising:

identifying a first logical circuit identifier for a first logical circuit in a first network; and

when a failure is detected in the first logical circuit;

identifying a second logical circuit identifier for a second logical circuit in a failover network separate from the first network, the second logical circuit to reroute data from the first logical circuit; and

renaming the first logical circuit without manual intervention to identify the first logical circuit using the second logical circuit identifier.

2. The method of claim 1, wherein the first network includes a first local access and transport area (LATA) and a second LATA and the first logical circuit traverses the first and second LATAs.

3. The method of claim 2, further comprising operating a network management system to detect the failure in the first logical circuit, the network management system in communication with the first and second LATAs and the failover network through management trunks.

4. The method of claim 3, further comprising operating the network management system to:

obtain status information associated with the first logical circuit from at least one of a plurality of switches forming the first logical circuit, the plurality of switches separate from the network management system;

detect the failure in the first logical circuit based on the status information; and

reroute the data via the second logical circuit in response to detecting the failure.

5. The method of claim 2, wherein the failover network includes a third LATA in communication with the first LATA via a first inter-exchange carrier (IEC) and in communication with the second LATA via a second IEC.

6. The method of claim 1, further comprising, when the failure is detected in the first logical circuit, mapping the first logical circuit identifier to the second logical circuit identifier in a data structure, and further comprising, when the first logical circuit is restored, accessing the first logical circuit identifier in the data structure based on the mapping and renaming the first logical circuit to identify the first logical circuit using the first logical circuit identifier.

7. The method of claim 1, wherein the failure is detected in the first logical circuit when at least one logical connection of the first logical circuit is not communicating data.

8. A system comprising:

a logical element module in communication with switches forming a first logical circuit in a first network and to receive status information from the switches associated with the first logical circuit; and

a network management module to;

identify a first logical circuit identifier for the first logical circuit; and

when a failure is detected in the first logical circuit based on the status information;

identify a second logical circuit identifier for a second logical circuit in a failover network separate from the first network, the second logical circuit to reroute data from the first logical circuit; and

rename the first logical circuit without manual intervention to identify the first logical circuit using the second logical circuit identifier.

9. The system of claim 8, wherein the first network includes a first local access and transport area (LATA) and a second LATA and the first logical circuit traverses the first and second LATAs.

10. The system of claim 9, wherein the logical element module is in communication with the switches in the first and second LATAs through management trunks.

11. The system of claim 9, wherein the failover network includes a third LATA in communication with the first LATA via a first inter-exchange carrier (IEC) and in communication with the second LATA via a second IEC.

12. The system of claim 8, wherein the logical element module and the network management module are separate from the switches forming the first logical circuit.

13. The system of claim 8, wherein the network management module is to:

map the first logical circuit identifier to the second logical circuit identifier in a data structure when the failure is detected in the first logical circuit; and

when the first logical circuit is restored, access the first logical circuit identifier in the data structure based on the mapping and rename the first logical circuit to identify the first logical circuit using the first logical circuit identifier.

14. The system of claim 8, wherein the failure is detected in the first logical circuit when at least one logical connection of the first logical circuit is not communicating data.

15. A non-transitory computer readable medium having instructions stored thereon that, when executed, cause a machine to at least:

identify a first logical circuit identifier for a first logical circuit in a first network; and

when a failure is detected in the first logical circuit;

identify a second logical circuit identifier for a second logical circuit in a failover network separate from the first network, the second logical circuit to reroute data from the first logical circuit; and

rename the first logical circuit without manual intervention to identify the first logical circuit using the second logical circuit identifier.

16. The non-transitory computer readable medium of claim 15, wherein the first network includes a first local access and transport area (LATA) and a second LATA and the first logical circuit traverses the first and second LATAs.

17. The non-transitory computer readable medium of claim 16 having instructions stored thereon that, when executed, cause the machine to detect the failure in the first logical circuit, the machine in communication with the first and second LATAs and the failover network through management trunks.

18. The non-transitory computer readable medium of claim 17 having instructions stored thereon that, when executed, cause the machine to:

obtain status information associated with the first logical circuit from at least one of a plurality of switches forming the first logical circuit, the plurality of switches separate from the machine;

detect the failure in the first logical circuit based on the status information; and

reroute the data via the second logical circuit in response to detecting the failure.

19. The non-transitory computer readable medium of claim 16, wherein the failover network includes a third LATA in communication with the first LATA via a first inter-exchange carrier (IEC) and in communication with the second LATA via a second IEC.

20. The non-transitory computer readable medium of claim 15 having instructions stored thereon that, when executed, cause the machine to:

when the failure is detected in the first logical circuit, map the first logical circuit identifier to the second logical circuit identifier in a data structure; and

when the first logical circuit is restored, access the first logical circuit identifier in the data structure based on the mapping and rename the first logical circuit to identify the first logical circuit using the first logical circuit identifier.