Battery processor circuitry with separate public and private bus
First Claim
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1. An integrated circuit adapted to be incorporated in a battery, comprising:
- A. a public bus adapted to be connected with a data bus of a battery interface that includes the data bus and a power bus;
B. a public non-volatile memory connected with the public bus and adapted to contain an encrypted identity key;
C. a public RAM connected with the public bus;
D. a private bus separate from the data bus;
E. a private non-volatile memory connected only with the private bus and adapted to contain an unencrypted identity key;
F. a private RAM connected only with the private bus; and
G. processor circuitry separately connected with the public bus and the private bus, the processor circuitry being adapted to combine the unencrypted identity key with challenge data received over the public bus, and to send signed challenge data over the public bus.
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Abstract
Systems and methods for providing a battery module 110 with secure identity information and authentication of the identity of the battery 110 by a host 120. In one embodiment, the system for providing a battery module with secure identity information includes: (1) a tamper resistant processing environment 200 located within the battery module 110 and (2) a key generator configured to generate a key based on an identity of the battery module 110 and cause the key to be stored within the tamper resistant processing environment 200.
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1 Claim
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1. An integrated circuit adapted to be incorporated in a battery, comprising:
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A. a public bus adapted to be connected with a data bus of a battery interface that includes the data bus and a power bus; B. a public non-volatile memory connected with the public bus and adapted to contain an encrypted identity key; C. a public RAM connected with the public bus; D. a private bus separate from the data bus; E. a private non-volatile memory connected only with the private bus and adapted to contain an unencrypted identity key; F. a private RAM connected only with the private bus; and G. processor circuitry separately connected with the public bus and the private bus, the processor circuitry being adapted to combine the unencrypted identity key with challenge data received over the public bus, and to send signed challenge data over the public bus.
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Specification