Applying non-homogeneous properties to multiple video processing units (VPUs)

• US 8,054,314 B2
• Filed: 05/27/2005
• Issued: 11/08/2011
• Est. Priority Date: 05/27/2005
• Status: Active Grant

• Current Assignee: ATI Technologies ULC (Advanced Micro Devices, Inc.)
• Original Assignee: ATI Technologies Incorporated (Advanced Micro Devices, Inc.)
• Inventors: Kelley, Timothy M., Gotwalt, David A., Campbell, Jonathan L.
• Primary Examiner(s): HARRISON, CHANTE E
• Application Number:
  US11/140,163
• Publication Number:
  US 20060267992A1
• Time in Patent Office: 2,356 Days
• Field of Search: 345/502, 345/505, 345/520, 345/522
• US Class Current: 345/502
• CPC Class Codes: G06F 9/30069 Instruction skipping instructions, e.g. SKIP
• CPC Class Codes: G06F 9/30072 to perform conditional operations, e.g. using predicates or guards
• CPC Class Codes: G06F 9/3885 using a plurality of independent parallel functional units

Abstract

A system and method for applying non-homogeneous properties to multiple video processing units (VPUs) in a multiple VPU system are described. Respective VPUs in the system cooperate to produce a frame to be displayed. In various embodiments, data output by different VPUs in the system is combined, or merged, or composited to produce a frame to be displayed. In load balancing modes, each VPU in the system performs different tasks as part of rendering a same frame, and therefore typically executes different commands. In various embodiments, efficiency of the system is enhanced by forming a single command buffer for execution by all of the VPUs in the system even though each VPU may have a different set of commands to execute in the command buffer.

Claims

1. A multi-processor method, comprising:

building a common set of commands and data that refer to a processing task;

receiving the common set of commands and data in each of a plurality of processors;

various processors of the plurality of processors interpreting the common set of commands and data differently so as to perform a designated portions of the processing task;

each of the plurality of processors reading a predicated execution command in the common set of commands and data;

each of the plurality of processors determining whether subsequent commands are intended to be executed by the processor based on information in the predicated execution command; and

each of the plurality of processors determining a number of subsequent commands to be executed based on information in the predicated execution command.

2. The method of claim 1, further comprising:

each of the plurality of processors executing the number of subsequent commands intended to be executed by the processor, and

each of the plurality of processors ignoring the number of subsequent commands not intended to be executed by the processor.

3. The method of claim 1, wherein building the common set of commands and data that refer to a processing task comprises:

determining whether a command is predicated, wherein a predicated execution command is intended to be executed by less than all of the plurality of processors; and

if the command is determined to be predicated, inserting a predication header in the common set that indicates one or more subsequent commands is intended to be executed by less than all of the plurality of processors.

4. The method of claim 3, further comprising:

determining whether a number of subsequent commands intended to be executed by less than all of the plurality of processors is known; and

if the number is known, inserting the number in the predication header.

5. The method of claim 3, further comprising:

determining whether a number of subsequent commands intended to be executed by less than all of the plurality of processors is known; and

if the number is not known, adding a subsequent predicated execution command to the common set;

determining whether there are additional subsequent predicated execution commands;

if there are no more additional subsequent predicated execution commands, determining the number; and

inserting the number in the predication header.

6. The method of claim 1, wherein the common set comprises command packets, and wherein interpreting comprises determining whether a packet type is a type defined for a specific processor.

7. The method of claim 6, further comprising, if the packet type is defined for a specific processor, the specific processor executing commands in the packet.

8. The method of claim 6, wherein building the common set comprises:

inserting a device identification header in a command packet, wherein the device identification header indicates a specific processor; and

inserting commands after the device identification header.