Method and system for minimizing the accumulated offset error for an analog to digital converter

• US 8,059,019 B2
• Filed: 03/09/2007
• Issued: 11/15/2011
• Est. Priority Date: 01/25/2005
• Status: Expired due to Fees

• Current Assignee: Atmel Corporation (Microchip Technology Incorporated)
• Original Assignee: Atmel Corporation (Microchip Technology Incorporated)
• Inventors: Fenheim, Torgeir, Gangstoe, Gunnar, Aas, Arne
• Primary Examiner(s): Nguyen; Khai M
• Application Number:
  US11/684,572
• Publication Number:
  US 20090058697A1
• Time in Patent Office: 1,712 Days
• Field of Search: 341/118, 341/143, 341/155
• US Class Current: 341/118
• CPC Class Codes: G01R 19/0092 measuring current only all subgroups of G01R19/00 take precedence
• CPC Class Codes: G01R 19/2509 Details concerning sampling, digitizing or waveform capturing
• CPC Class Codes: H03M 1/0607 Offset or drift compensation removal of offset already present on the analogue input signal H03M1/1295
• CPC Class Codes: H03M 1/0656 in the time domain, e.g. using intended jitter as a dither signal
• CPC Class Codes: H03M 3/34 by chopping
• CPC Class Codes: H03M 3/356 Offset or drift compensation removal of offset already present on the analogue input signal H03M3/494

Abstract

A method and system utilized with an analog to digital converter is disclosed. The method and system comprise providing a first conversion on an input signal. In the first conversion, an offset error is added to the input signal to provide a first result. The method and system further includes providing a second conversion on the input signal. In the second conversion, an offset error is subtracted from the input signal to provide a second result. The first and second results are then combined to substantially remove the offset error. A system and method in accordance with the present invention compensates for the accumulated offset error over many samples, thereby achieving much higher accuracy in the offset error compensation.

Claims

1. A method utilized with an analog to digital converter comprising:

providing a first conversion on an input signal, wherein an offset error is added to the input signal to provide a first result and wherein the first conversion comprises a first set of n conversions;

providing a second conversion on the input signal, wherein the offset error is subtracted from the input signal to provide a second result and wherein the second conversion comprises a second set of n conversions; and

combining the first and second results to substantially remove the offset error of the analog to digital converter,

wherein a value of n is based on a settling time associated with a filter.

2. The method of claim 1 wherein the offset error is associated with a modulator within the analog to digital converter.

3. The method of claim 2 wherein the polarity of the first conversion of the input signal is opposite that of the polarity of the second conversion of the input signal.

4. The method of claim 3 wherein the combining step comprises inverting the polarity of the second result and averaging the first and second results, wherein the modulator offset error is removed.

5. The method of claim 4 wherein the combining step is controlled by software.

6. The method of claim 4 wherein software inverts the second result.

7. The method of claim 4 wherein hardware within the modulator inverts the second result.

8. An analog to digital converter comprising:

a modulator adapted to generate an oversampled signal;

a digital filter coupled to the modulator for removing out of band noise and for reducing the data rate to achieve a high resolution signal;

a polarity switcher coupled to the modulator for switching the polarity of an input signal to the modulator; and

a control mechanism for controlling the polarity switcher, the control mechanism for providing a first conversion on an input signal, wherein an offset error is added to the input signal to provide a first result and wherein the first conversion comprises a first set of n conversions;

for providing a second conversion on the input signal, wherein the offset error is subtracted from the input signal to provide a second result and wherein the second conversion comprises a second set of n conversions; and

for combining the first and second results to substantially remove the offset error, wherein a value of n is based on a settling time associated with the digital filter.

9. The analog to digital converter of claim 8 wherein the modulator comprises a sigma delta modulator.

10. The analog to digital converter of claim 8 wherein the digital filter comprises first and second decimation filters, wherein the first decimation filter provides an instantaneous current output and the second decimation filter provides accumulate current output.

11. The analog to digital converter of claim 8 wherein the control mechanism comprise software.

12. The analog to digital converter of claim 8 wherein the polarity of the first conversion of the input signal is opposite that of the polarity of the second conversion of the input signal.

13. The analog to digital converter of claim 12 wherein the combining step comprises inverting the polarity of the second result and averaging the first and second results, wherein the modulator offset error is removed.

14. The analog to digital converter of claim 13 wherein the polarity switcher is controlled by software.

15. The analog to digital converter of claim 13 wherein the software inverts the second result.

16. The analog to digital converter of claim 13 wherein hardware within the modulator inverts the second result.

17. A system comprising:

a microcontroller; and

an analog to digital converter being integrated into the microcontroller, the analog to digital converter comprising a modulator adapted to generate an oversampled signal;

a digital filter coupled to the modulator for removing out of band noise and for reducing the data rate to achieve a high resolution signal;

a polarity switcher coupled to the modulator for switching the polarity of an input signal to the modulator; and

a control mechanism for controlling the polarity switcher, the control mechanism providing a first conversion on an input signal, wherein an offset error is added to the input signal to provide a first result and wherein the first conversion comprises a first set of n conversions;

providing a second conversion on the input signal, wherein the offset error is subtracted from the input signal to provide a second result and wherein the second conversion comprises a second set of n conversions; and

combining the first and second results to substantially remove the offset error, wherein a value of n is based on a settling time associated with the digital filter.

18. A computer readable medium encoded with a computer program comprising instructions that when executed, operate to cause a machine to perform operations:

providing a first conversion on an input signal, wherein an offset error is added to the input signal to provide a first result and wherein the first conversion comprises a first set of n conversions;

providing a second conversion on the input signal, wherein the offset error is subtracted from the input signal to provide a second result and wherein the second conversion comprises a second set of n conversions; and

combining the first and second results to substantially remove the offset error of the analog to digital converter wherein a value of n is based on a settling time associated with a filter.

19. The computer readable medium of claim 18 wherein the offset error is provided by a modulator within the analog to digital converter.

20. The computer readable medium of claim 19 wherein the polarity of the first conversion of the input signal is opposite that of the polarity of the second conversion of the input signal.

21. The computer readable medium of claim 20 wherein the combining step comprises inverting the polarity of the second result and averaging the first and second results, wherein the modulator offset error is removed.

22. The computer readable medium of claim 21 wherein the combining step is controlled by software.

23. The computer readable medium of claim 21 wherein the software inverts the second result.

24. The computer readable medium of claim 21 wherein hardware within the modulator inverts the second result.

25. A method utilized with an analog to digital converter comprising:

providing a first conversion on an input signal via a polarity switcher, wherein an offset error is added to the input signal to provide a first result and wherein the first conversion comprises a first set of n conversions;

providing a second conversion on the input signal via the polarity switcher, wherein the offset error is subtracted from the input signal to provide a second result, wherein the second conversion comprises a second set of n conversions and wherein the polarity switcher is controlled by software; and

combining the first and second results to substantially remove the offset error of the analog converter wherein the offset error is measured without interrupting conversions of the input signal, wherein a value of n is based on a settling time associated with a filter.

26. An analog to digital converter comprising:

a modulator adapted to generate an oversampled signal;

a digital filter coupled to the modulator for removing out of band noise and for reducing the data rate to achieve a high resolution signal;

a polarity switcher coupled to the modulator for switching the polarity of an input signal to the modulator; and

a software program for controlling the polarity switcher, the software program for providing a first conversion on an input signal, wherein an offset error is added to the input signal to provide a first result and wherein the first conversion comprises a first set of n conversions;

for providing a second conversion on the input signal, wherein the offset error is subtracted from the input signal to provide a second result and wherein the second conversion comprises a second set of n conversions; and

for combining the first and second results to substantially remove the offset error wherein the offset error is measured without conversions of the input signal wherein a value of n is based on a settling time associated with the digital filter.

27. A system comprising:

a microcontroller; and

an analog to digital converter being integrated into the microcontroller, the analog to digital converter comprising a modulator adapted to generate an oversampled signal;

a digital filter coupled to the modulator for removing out of band noise and for reducing the data rate to achieve a high resolution signal;

a polarity switcher coupled to the modulator for switching the polarity of an input signal to the modulator; and

a software program for controlling the polarity switcher, the software program providing a first conversion on an input signal, wherein an offset error is added to the input signal to provide a first result and wherein the first conversion comprises a first set of n conversions;

providing a second conversion on the input signal, wherein the offset error is subtracted from the input signal to provide a second result and wherein the second conversion comprises a second set of n conversions; and

combining the first and second results to substantially remove the first error wherein the offset error is measured without conversions of the input signal and wherein a value of n is based on a settling time associated with the digital filter.

28. A computer readable storage medium containing program instructions utilized with an analog to digital converter, the program instructions for:

providing a first conversion on an input signal via the polarity switcher, wherein an offset error is added to the input signal to provide a first result and wherein the first conversion comprises a first set of n conversions;

providing a second conversion on the input signal via the polarity switcher, wherein the offset error is subtracted from the input signal to provide a second result, wherein the second conversion comprises a second set of n conversions and wherein the polarity switcher is controlled by software; and

combining the first and second results to substantially remove the offset error of the analog to digital converter wherein the offset error is measured without conversions of the input signal and wherein a value of n is based on a settling time associated with a digital filter.