Conductive layers for hafnium silicon oxynitride films

• US 8,067,794 B2
• Filed: 05/03/2010
• Issued: 11/29/2011
• Est. Priority Date: 02/16/2006
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Ahn, Kie Y., Forbes, Leonard
• Primary Examiner(s): Nguyen; Thinh T
• Application Number:
  US12/772,473
• Publication Number:
  US 20100207181A1
• Time in Patent Office: 575 Days
• Field of Search: 257/310, 257/296, 257/410, 257/761, 257/E27.084, 438/706, 438/785, 438/791
• US Class Current: 257/310
• CPC Class Codes: C23C 16/30 Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
• CPC Class Codes: C23C 16/45529 specially adapted for making a layer stack of alternating different compositions or gradient compositions
• CPC Class Codes: C23C 16/45531 specially adapted for making ternary or higher compositions
• CPC Class Codes: H01L 21/02148 the material containing hafnium, e.g. HfSiOx or HfSiON
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/3141 Deposition using atomic layer deposition techniques [ALD]
• CPC Class Codes: H01L 21/31645 Deposition of Hafnium oxides, e.g. HfO2
• CPC Class Codes: H01L 21/318 composed of nitrides
• CPC Class Codes: H01L 27/092 complementary MIS field-effect transistors
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H01L 29/495 the conductor material next to the insulator being a simple metal, e.g. W, Mo H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/51 Insulating materials associated therewith for MIS structures on thin film semiconductor H01L29/4908
• CPC Class Codes: H01L 29/512 the variation being parallel to the channel plane
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/7881 Programmable transistors with only two possible levels of programmation H01L29/7888 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Electronic apparatus and methods of forming the electronic apparatus include a HfSiON film on a substrate for use in a variety of electronic systems. The HfSiON film may be structured as one or more monolayers. Electrodes to a dielectric containing a HfSiON may be structured as one or more monolayers of titanium nitride, tantalum, or combinations of titanium nitride and tantalum.

Claims

1. An electronic device comprising:

a dielectric layer in an integrated circuit on a substrate, the dielectric layer including a hafnium silicon oxynitride film, the hafnium silicon oxynitride film doped with elements or compounds other than hafnium or silicon; and

an electrode coupled to the hafnium silicon oxynitride film, the electrode having a layer of titanium nitride or a layer of tantalum, the layer of titanium nitride or the layer of tantalum coupling the electrode to the hafnium silicon oxynitride film.

2. The electronic device of claim 1, wherein the dielectric layer is configured essentially as a nanolaminate.

3. The electronic device of claim 1, wherein the integrated circuit includes a capacitor having the dielectric layer as a capacitor dielectric.

4. The electronic device of claim 3, wherein the integrated circuit includes an analog integrated circuit in which the capacitor is disposed.

5. The electronic device of claim 3, wherein the integrated circuit includes a radio frequency integrated circuit in which the capacitor is disposed.

6. The electronic device of claim 3, wherein the integrated circuit includes a mixed signal circuit in which the capacitor is disposed.

7. The electronic device of claim 1, wherein the integrated circuit includes:

the hafnium silicon oxynitride film disposed as a first layer of hafnium silicon oxynitride;

the titanium nitride layer disposed on the first layer of hafnium silicon oxynitride;

a second layer of hafnium silicon oxynitride; and

a tantalum layer on the second layer of hafnium silicon oxynitride.

8. The electronic device of claim 7, wherein the titanium nitride layer is configured as a gate in a NMOS transistor with the first layer of hafnium silicon oxynitride configured as a gate insulator in the NMOS transistor and the tantalum is configured as a gate in a PMOS transistor with the second layer of hafnium silicon oxynitride configured as a gate insulator in the PMOS transistor such that the NMOS transistor and the PMOS transistor have substantially symmetrical threshold voltages.

9. The electronic device of claim 7, wherein the first and second layers of hafnium silicon oxynitride are structured as gate insulators in a CMOS structure.

10. The electronic device of claim 9, wherein the CMOS structure includes a silicon-based CMOS structure.

11. The electronic device of claim 7, wherein one of the first layer of hafnium silicon oxynitride or the second layer of hafnium silicon oxynitride is configured as a capacitor dielectric in a capacitor in the integrated circuit and the other one of the first layer of hafnium silicon oxynitride or the second layer of hafnium silicon oxynitride is configured as a gate insulator in a transistor in the integrated circuit.

12. The electronic device of claim 1, wherein the dielectric layer includes a plurality of different insulating materials having one or more of hafnium oxide, silicon oxide, an insulating metal oxide such that the metal is selected to be a metal different from hafnium, an insulating nitride layer, an insulating oxynitride layer, or an insulating silicate in addition to the hafnium silicon oxynitride film.

13. The electronic device of claim 1, wherein the electronic device includes a memory device having the dielectric layer as a memory cell component.

14. The electronic device of claim 1, wherein the electronic device includes a conductive path to a conductive layer disposed on and contacting the dielectric layer to provide a signal to the conductive layer to operate in an electronic system.

15. An electronic device comprising:

a memory in an integrated circuit on a substrate, the memory having a memory cell, the memory cell including;

a capacitor including a first dielectric region, the first dielectric region containing a first hafnium silicon oxynitride film, the first hafnium silicon oxynitride film doped with elements or compounds other than hafnium or silicon, the capacitor including an electrode coupled to the hafnium silicon oxynitride film, the electrode having a layer of titanium nitride or a layer of tantalum, the layer of titanium nitride or the layer of tantalum coupling the electrode to the hafnium silicon oxynitride film, the titanium nitride arranged as one or more monolayers, the tantalum arranged as one or more monolayers;

a transistor coupled to the capacitor, the transistor including a second dielectric region, the second dielectric region containing a second hafnium silicon oxynitride film, the second hafnium silicon oxynitride film arranged as one or more monolayers, the transistor including tantalum or titanium nitride on and contacting the second hafnium silicon oxynitride film, the tantalum arranged as one or more monolayers, the titanium nitride arranged as one or more monolayers.

16. The electronic device of claim 15, wherein the capacitor includes titanium nitride without tantalum and the transistor includes tantalum without titanium nitride.

17. The electronic device of claim 15, wherein the second hafnium silicon oxynitride film is doped.

18. The electronic device of claim 15, wherein the second hafnium silicon oxynitride film includes a hafnium-rich hafnium silicon oxynitride film.

19. The electronic device of claim 15, wherein the second dielectric region includes, in addition to the second hafnium silicon oxynitride film, one or more of hafnium oxide, silicon oxide, an insulating metal oxide such that the metal is selected to be a metal different from hafnium, an insulating nitride layer, an insulating oxynitride layer, or an insulating silicate.

20. An electronic device comprising:

a first nanolaminate disposed in an integrated circuit on a substrate, the nanolaminate containing a first plurality of different insulating materials including a first region of hafnium silicon oxynitride, the first region of hafnium silicon oxynitride arranged as one or more monolayers and doped with elements or compounds other than hafnium or silicon;

a first electrode coupled to the first region of hafnium silicon oxynitride, the first electrode having a layer of titanium nitride on the first nanolaminate, the layer of titanium nitride coupling the first electrode to the first region of hafnium silicon oxynitride, the titanium nitride arranged as one or more monolayers;

a second nanolaminate disposed in the integrated circuit, the second nanolaminate containing a second plurality of different insulating materials including a second region of hafnium silicon oxynitride, the second region of hafnium silicon oxynitride arranged as one or more monolayers and doped with elements or compounds other than hafnium or silicon, the second region of hafnium silicon oxynitride separate from the first region of hafnium silicon oxynitride; and

a second electrode coupled to the second region of hafnium silicon oxynitride, the second electrode having a layer of tantalum on the second nanolaminate, the layer of tantalum coupling the second electrode to the second region of hafnium silicon oxynitride, the tantalum arranged as one or more monolayers.

21. The electronic device of claim 20, wherein the first nanolaminate is structured as a gate dielectric in a PMOS transistor of a CMOS structure and the titanium nitride is structured as a gate in the PMOS transistor and the second nanolaminate is structured as a gate dielectric in a NMOS transistor of the CMOS structure and the tantalum is structured as a gate in the NMOS transistor.

22. The electronic device of claim 21, wherein the NMOS transistor and the PMOS transistor have substantially symmetrical threshold voltages.

23. The electronic device of claim 20, wherein one or both of the first nanolaminate and the second nanolaminate includes silicon nitride.

24. The electronic device of claim 20, wherein one or both of the first nanolaminate and the second nanolaminate are structured to store charge in a NROM device.

25. The electronic device of claim 24, wherein silicon oxide is structured to store the charge storage.