Power and ground routing of integrated circuit devices with improved IR drop and chip performance

  • US 8,072,004 B2
  • Filed: 09/15/2010
  • Issued: 12/06/2011
  • Est. Priority Date: 03/21/2008
  • Status: Active Grant
First Claim
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1. An integrated circuit chip comprising:

  • a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of first conductive layers embedded in respective said plurality of IMD layers, wherein said first conductive layers comprise copper;

    a first passivation layer overlying said plurality of IMD layers and said plurality of first conductive layers;

    a plurality of first power/ground mesh wiring lines, formed in a second conductive layer overlying said first passivation layer, for distributing power signal or ground signal, wherein said second conductive layer comprise aluminum; and

    a second passivation layer covering said second conductive layer and said first passivation layer.

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