Semiconductor device structures and related processes

CAFC
  • US 8,076,719 B2
  • Filed: 02/10/2009
  • Issued: 12/13/2011
  • Est. Priority Date: 02/14/2008
  • Status: Active Grant
First Claim
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1. A semiconductor device structure, comprising:

  • a semiconductor layer;

    a gate which is positioned in a first trench within said semiconductor layer, and is capacitively coupled to control vertical conduction from a first-conductivity-type source through second-conductivity-type portions of said layer near said trench;

    recessed field plates, positioned in proximity to and capacitively coupled to said semiconductor material;

    said recessed field plates being positioned in respective second trenches;

    a first additional diffusion component of a second conductivity type lying at least partially beneath said respective second trenches; and

    a second additional diffusion component of said first conductivity type lying at least partially within said second-conductivity-type portions of said layer;

    whereby said first additional diffusion component reduces depletion of said second-conductivity-type portions of said layer in the OFF state;

    and whereby said second additional diffusion component reduces the on-resistance of the device in the ON state.

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