Circuit for detecting remaining battery capacity

• US 8,076,904 B2
• Filed: 02/12/2007
• Issued: 12/13/2011
• Est. Priority Date: 02/13/2006
• Status: Active Grant

• Current Assignee: Mitsumi Electric Co., Ltd. (MinebeaMitsumi Inc.)
• Original Assignee: Mitsumi Electric Co., Ltd. (MinebeaMitsumi Inc.)
• Inventors: Nakano, Itsuki, Ikeuchi, Akira
• Primary Examiner(s): Tso, Edward
• Assistant Examiner(s): PIGGUSH, AARON C
• Application Number:
  US11/706,484
• Publication Number:
  US 20070188146A1
• Time in Patent Office: 1,765 Days
• Field of Search: 320/132, 320/133, 320/134, 320/149, 324/427, 324/428
• US Class Current: 320/132
• CPC Class Codes: H02J 7/0048 Detection of remaining charge capacity or state of charge [SOC]

Abstract

A disclosed circuit for detecting remaining battery capacity includes: a current detection unit detecting a charge and discharge current of a battery; a remaining capacity measurement unit measuring remaining capacity of the battery by integrating the charge and discharge current at first time intervals when the charge and discharge current detected in the current detection unit is not more than a predetermined value and at second time intervals shorter than the first time intervals when the charge and discharge current exceeds the predetermined value; and an interrupt signal generation unit generating an interrupt signal when the charge and discharge current exceeds a reference value and instructing the remaining capacity measurement unit to measure remaining capacity of the battery.

Claims

1. A circuit for detecting remaining battery capacity, comprising:

a current detection unit detecting a charge and discharge current of a battery;

a remaining capacity measurement unit including a central processing unit (CPU), the remaining capacity measurement unit measuring remaining capacity of the battery by integrating the charge and discharge current at first time intervals and at second time intervals shorter than the first time intervals, and the CPU performing a digital filter process and a remaining capacity measurement process;

an interrupt signal generation unit generating an interrupt signal to the CPU of the remaining capacity measurement unit when the charge and discharge current exceeds a reference value and instructing the remaining capacity measurement unit to measure remaining capacity of the battery, the interrupt signal allowing the CPU to enter an awake status from a sleep status;

a voltage detection unit connected to the battery and providing a voltage detection signal;

a temperature detection unit connected to the battery and providing a temperature detection signal;

a current detection unit connected to the battery and providing a current detection signal;

a sigma-delta modulator; and

a multiplexer which selects a selected detection signal from one of the voltage detection signal, the temperature detection signal, and the current detection signal, and provides the selected detection signal to the sigma-delta modulator, wherein the selection is performed based on a control signal from the CPU;

wherein the CPU judges, following the measurement of remaining capacity, whether the charge and discharge current exceeds a predetermined value, and if the charge and discharge current is not more than the predetermined value and maintained for a predetermined time, the CPU sets the time intervals for measuring the remaining capacity of the battery to the first time intervals and if the charge and discharge current exceeds the predetermined value, the CPU sets the time intervals to the second time intervals.

2. The circuit for detecting remaining battery capacity according to claim 1, wherein the current detection unit detects a voltage between both ends of a resistance where the charge and discharge current passes through, and the interrupt signal generation unit generates the interrupt signal when the voltage between both ends of the resistance where the charge and discharge current passes through exceeds a first reference value and when the voltage between both ends of the resistance where the charge and discharge current passes through is less than a second reference value lower than the first reference value.

3. The circuit for detecting remaining battery capacity according to claim 2, wherein the interrupt signal generation unit includes a window comparator.

4. The circuit for detecting remaining battery capacity according to claim 1, further including a fuel gauge integrated circuit (IC) which detects remaining battery capacity.

5. The circuit for detecting remaining battery capacity according to claim 4, wherein the fuel gauge IC is configured as an integrated semiconductor.

6. The circuit for detecting remaining battery capacity according to claim 5, wherein the fuel gauge IC includes a digital unit and an analog unit.

7. A method for detecting remaining battery capacity, comprising:

detecting a charge and discharge current of a battery;

measuring remaining capacity of the battery by integrating the charge and discharge current at first time intervals and at second time intervals shorter than the first time intervals, and performing a digital filter process and a remaining capacity measurement process;

generating an interrupt signal to a CPU of the remaining capacity measurement unit when the charge and discharge current exceeds a reference value and instructing the remaining capacity measurement unit to measure remaining capacity of the battery, the interrupt signal allowing the CPU to enter an awake status from a sleep status;

judging, following the measurement of remaining capacity, whether the charge and discharge current exceeds a predetermined value;

after generating an interrupt signal, controlling a multiplexer to sequentially select, in any order, a voltage detection signal, temperature detection signal, and current detection signal;

converting the voltage detection signal, temperature detection signal, and current detection signal, into pulse density multiplexed (PDM) signals via sigma-delta modulation; and

digitizing the PDM signals via a digital filter process;

wherein, if the charge and discharge current is not more than the predetermined value and maintained for a predetermined time, the CPU sets the time intervals for measuring the remaining capacity of the battery to the first time intervals and if the charge and discharge current exceeds the predetermined value, the CPU sets the time intervals to the second time intervals.

8. The method for detecting remaining battery capacity according to claim 7, further including detecting a voltage between both ends of a resistance where the charge and discharge current passes through, and generating the interrupt signal when the voltage between both ends of the resistance where the charge and discharge current passes through exceeds a first reference value and when the voltage between both ends of the resistance where the charge and discharge current passes through is less than a second reference value lower than the first reference value.

9. The method for detecting remaining battery capacity according to claim 8, further including performing a window comparison.