Apparatus and methods for optimizing the performance of programmable logic devices using multiple supply voltage

• US 8,103,975 B2
• Filed: 07/01/2008
• Issued: 01/24/2012
• Est. Priority Date: 08/16/2005
• Status: Active Grant

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Altera Corporation (Intel Corporation)
• Inventors: Lewis, David, Betz, Vaughn, Leventis, Paul, Lane, Christopher, Lee, Andy, Watt, Jeffrey, Vanderhoek, Timothy
• Primary Examiner(s): Levin, Naum B
• Application Number:
  US12/165,664
• Publication Number:
  US 20080263490A1
• Time in Patent Office: 1,302 Days
• Field of Search: 716 4- 6, 716/113, 716/121, 716/128, 326 38- 39
• US Class Current: 716/6
• CPC Class Codes: G06F 30/394 Routing G06F30/396 takes precedence
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36
• CPC Class Codes: H03K 19/17784 for supply voltage

Abstract

A programmable logic device (PLD) includes first and second circuits. The first and second circuits are part of a user'"'"'s design to be implemented using the PLD'"'"'s resources. The first circuit is powered by a first supply voltage. The second circuit is powered by a second supply voltage. At least one of the first and second supply voltages is determined by a PLD computer-aided design (CAD) flow used to implement the user'"'"'s design in the PLD.

Claims

1. A computer-aided method of implementing an electronic circuit by using resources within a programmable logic device (PLD), wherein the PLD is powered by first and second supply voltages, the method comprising:

(a1) assigning, using the computer, a preset level to the first supply voltage, and assigning a nominal level to the second supply voltage;

(b1) performing, using the computer, place and route of the resources within the PLD used to implement the electronic circuit; and

(c1) determining, using the computer, a value of the second supply voltage level that meets a timing specification of the electronic circuit.

2. The method according to claim 1, wherein determining a value of the second supply voltage level that meets a timing specification of the electronic circuit further comprises determining, using the computer, a minimum value of the second supply voltage level that meets a timing specification of the electronic circuit.

3. The method according to claim 2, wherein determining a value of the second supply voltage level that meets a timing specification of the electronic circuit further comprises:

determining, using the computer, whether the selected second supply level is sufficient to provide a desired level of performance; and

going to (b1) if the selected second supply level is insufficient to provide the desired level of performance.

4. The method according to claim 2, wherein determining a minimum value of the second supply voltage level that meets a timing specification of the electronic circuit further comprises using a timing model with dependency on the second supply voltage value.

5. The method according to claim 4, wherein determining a minimum value of the second supply voltage level that meets a timing specification of the electronic circuit further comprises using timing computed as a function of voltage to estimate a new value for the second supply voltage level.

6. A computer-aided method of implementing an electronic circuit using resources within a programmable logic device (PLD), wherein the PLD is powered by first and second supply voltages, the method comprising:

(a2) assigning, using the computer, a preset level to the first supply voltage, and assigning a nominal level to the second supply voltage;

(b2) performing, using the computer, a placement of the resources within the PLD;

(c2) optimizing, using the computer, the placement by using delay estimates corresponding to the second supply voltage level; and

(d2) determining, using the computer, a value of the second supply voltage level that meets a timing specification of the electronic circuit.

7. The method according to claim 6, wherein determining a value of the second supply voltage level that meets a timing specification of the electronic circuit further comprises determining, using the computer, a minimum value of the second supply voltage level that meets a timing specification of the electronic circuit.

8. The method according to claim 7, wherein determining a value of the second supply voltage level that meets a timing specification of the electronic circuit further comprises:

assigning, using the computer, to the second supply voltage a maximum level depending on successfully determining a value of the second supply voltage level that meets a timing specification of the electronic circuit; and

determining, using the computer, whether timing and routability goals are met at the second supply voltage level.

9. The method according to claim 8, further comprising:

creating, using the computer, a routing that meets a set of routing specifications;

optimizing, using the computer, timing of the electronic circuit; and

analyzing, using the computer, the electronic circuit to determine the minimum second supply voltage value that allows meeting a set of timing specifications.