Method and structure for thick layer transfer using a linear accelerator

• US 8,124,499 B2
• Filed: 11/05/2007
• Issued: 02/28/2012
• Est. Priority Date: 11/06/2006
• Status: Expired due to Fees

• Current Assignee: Silicon Genesis
• Original Assignee: Silicon Genesis
• Inventors: Henley, Francois J., Lamm, Albert, Adibi, Babak
• Primary Examiner(s): Richards, N Drew
• Assistant Examiner(s): Jung, Michael
• Application Number:
  US11/935,197
• Publication Number:
  US 20080206962A1
• Time in Patent Office: 1,576 Days
• Field of Search: None
• US Class Current: 438/460
• CPC Class Codes: H01L 21/26506 in group IV semiconductors
• CPC Class Codes: H01L 21/2658 of a molecular ion, e.g. decaborane
• CPC Class Codes: H01L 21/26593 at a temperature lower than room temperature
• CPC Class Codes: H01L 21/3221 of silicon bodies, e.g. for gettering
• CPC Class Codes: H01L 21/76254 with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
• CPC Class Codes: Y02E 10/50 Photovoltaic [PV] energy

Abstract

Free standing thickness of materials are fabricated using one or more semiconductor substrates, e.g., single crystal silicon, polysilicon, silicon germanium, germanium, group III/IV materials, and others. A semiconductor substrate is provided having a surface region and a thickness. The surface region of the semiconductor substrate is subjected to a first plurality of high energy particles generated using a linear accelerator to form a region of a plurality of gettering sites within a cleave region, the cleave region being provided beneath the surface region to defined a thickness of material to be detached, the semiconductor substrate being maintained at a first temperature. The surface region of the semiconductor substrate is subjected to a second plurality of high energy particles generated using the linear accelerator, the second plurality of high energy particles being provided to increase a stress level of the cleave region from a first stress level to a second stress level.

Claims

1. A method for fabricating a free standing thickness of materials using one or more semiconductor substrates, comprising:

providing a semiconductor substrate having a surface region and a thickness;

subjecting the surface region of the semiconductor substrate to a first plurality of energetic particles generated using a linear accelerator to form a region of a plurality of gettering sites within a cleave region, the cleave region being provided beneath the surface region to define a thickness of material to be detached, the semiconductor substrate being maintained at a first temperature;

subjecting the semiconductor substrate to a treatment process;

subjecting the surface region of the semiconductor substrate to a second plurality of energetic particles generated using the linear accelerator, the second plurality of energetic particles being provided to increase a stress level of the cleave region from a first stress level to a second stress level, the semiconductor substrate being maintained at a second temperature,

wherein the second temperature is higher than the first temperature and greater than 350 Degrees Celsius; and

freeing the thickness of material to be detached using a cleaving process, wherein a surface of the material to be detached that faces away from a remaining portion of the semiconductor substrate is not bonded to a support member during the cleaving process.

2. The method of claim 1 wherein the semiconductor substrate comprises monocrystalline silicon or polycrystalline silicon.

3. The method of claim 2 wherein the hydrogen species are provided at a dose of between about 1×

10¹⁵ and 2×

10¹⁶ atoms per cm².

4. The method of claim 1 wherein the first plurality of energetic particles or the second plurality of energetic particles comprise hydrogen species or helium species.

5. The method of claim 1 wherein the linear accelerator comprises a radio frequency quadrupole (RFQ).

6. The method of claim 1 wherein the first plurality of energetic particles are provided in an energy ranging from 0.5 MeV to 12 MeV.

7. The method of claim 1 wherein the treatment process is a thermal process provided at a temperature of 400 Degree Celsius or higher to render the microscopic defect region to be close to the cleave region and stabilize the microscopic defect region.

8. The method of claim 1 wherein the first temperature is less than about 250 Degrees Celsius.

9. The method of claim 1 wherein the thickness of material to be detached has a thickness of between about 50-100 microns.

10. The method of claim 1 wherein the first plurality of energetic particles and the second plurality of energetic particles are provided from the linear accelerator in an expanded beam having a dimension of about 500 mm in diameter on the surface region of the semiconductor substrate.

11. The method of claim 1 wherein the treatment process comprises:

subjecting the surface region to high energy particle beams to provide thermal treatment.

12. The method of claim 1 wherein subjecting the surface region to the first plurality of energetic particles comprises a patterned implant dose profile.

13. The method of claim 1 wherein subjecting the surface region to the second plurality of energetic particles comprises a patterned implant dose profile.

14. A method for forming a free standing thickness of layer transferred material, the method comprising:

providing a crystalline substrate material having a surface region;

introducing a plurality of first particles at a first dose range and within a first temperature range, whereupon the first dose range being less than an amount sufficient to cause the plurality of first particles to be permanently disposed in the crystalline substrate material at an accumulation region, through the surface region to the accumulation region of the crystalline substrate material to form an implant profile having a peak concentration and a base to form the accumulation region, the plurality of first particles causing a plurality of defects in the crystalline substrate material in the accumulation region, the accumulation region being defined by a depth greater than about 20 microns beneath the surface region and a slice of crystalline material to be detached between the accumulation region and the surface region;

performing a treatment process on the crystalline substrate material to cause formation of a plurality of substantially permanent defects that have been quenched in the crystalline substrate material from the first particles in the accumulation region; and

introducing a plurality of second particles at a second dose range and a second temperature range into the accumulation region to increase an internal stress in the accumulation region to cause a portion of the accumulation region to be cleavable, wherein the second temperature range is higher than the first temperature range and does not include a temperature that is less than or equal to 350 Degrees Celsius;

forming a free standing thickness of crystalline material by detaching a thickness of crystalline material from a remaining portion of the crystalline substrate material, wherein a surface of the free standing thickness of crystalline material that faces away form a remaining portion of the crystalline substrate is free from a support member during the detaching.

15. The method of claim 14 wherein the crystalline substrate material is a single crystal silicon or polycrystalline silicon.

16. The method of claim 14 wherein the first dose range is from about 2×

10¹⁵ to 2×

10¹⁶ ions per cm².

17. The method of claim 14 wherein the plurality of first particles are introduced while the crystalline substrate material is maintained at a temperature ranging from about −

50 to +250 Degrees Celsius.

18. The method of claim 14 wherein the first plurality of particles comprises of hydrogen.

19. The method of claim 14 wherein the base has a width of about 2 Rp or less, where Rp is a depth variation of an implant concentration profile.

20. A method for forming a free standing layer of semiconductor material, the method comprising:

providing a bulk semiconductor material having a surface;

implanting through the surface and into the bulk material, a first plurality of particles output by a linear accelerator at an energy of between about 0.5-12 MeV, to form a cleave region comprising a plurality of gettering sites, a distance between the cleave region and the surface defining a thickness of a semiconductor material to be detached, the bulk semiconductor material being maintained at a first temperature;

introducing a second plurality of a high energy particles into the cleave region, the bulk semiconductor material being maintained at a second temperature that is higher than the first temperature and greater than 350 Degrees Celsius; and

freeing the thickness of semiconductor material to be detached using a controlled cleaving process, a surface of the thickness of semiconductor material to be detached that faces away from a remaining portion of the semiconductor substrate being free from a support member during the controlled cleaving.

21. The method of claim 20 wherein:

the implanting is performed in a pattern to create the cleave region locally; and

the controlled cleaving is initiated at the cleave region and then propagated across the bulk material.

22. The method of claim 21 wherein the implanting is performed by controlling a dwell time of a beam of the first plurality of particles.

23. The method of claim 21 wherein the implanting is performed by controlling a number of exposures of the cleave region to a beam of the first plurality of particles.

24. The method of claim 21 wherein the controlled cleaving action is initiated by application of physical stress to the substrate.

25. The method of claim 24 wherein the physical stress is applied to the substrate by changing a thermal state of the substrate, by striking the substrate, or by changing a shape of an element to which the substrate is bound.