Impedance matching method

• US 8,143,967 B2
• Filed: 04/14/2010
• Issued: 03/27/2012
• Est. Priority Date: 04/17/2009
• Status: Expired due to Fees

• Current Assignee: Qualcomm Technologies Incorporated (Qualcomm, Inc.)
• Original Assignee: Epcos AG (TDK Corporation)
• Inventors: Schmidhammer, Edgar
• Primary Examiner(s): Jones, Stephen
• Application Number:
  US12/760,053
• Publication Number:
  US 20100265003A1
• Time in Patent Office: 713 Days
• Field of Search: 333/17.3, 333/33
• US Class Current: 333/17.3
• CPC Class Codes: H03H 7/40 Automatic matching of load impedance to source impedance
• CPC Class Codes: H04B 1/0458 Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages matching circuits in general H03H
• CPC Class Codes: H04B 1/18 Input circuits, e.g. for coupling to an antenna or a transmission line coupling networks between antennas or lines and receivers independent of the nature of the receiver H03H

Abstract

An impedance matching method which is used to save electrical energy by virtue of the fact that the method switches between modes for controlling impedance matching and modes for regulation of the impedance matching depending on the situation. An algorithm which, on the basis of control signals from an external circuit environment, controls or regulates the impedance of a variable-impedance circuit element is implemented in a logic circuit LC.

Claims

1. A method for matching an impedance of a first signal line of a signal path to an impedance of a first variable-impedance circuit element in an energy-saving manner using an impedance matching circuit electrically connected to an external circuit environment, the impedance matching circuit including

a first matching network electrically connected to the first signal line and having an impedance that is regulated or controlled by a logic circuit electrically connected to the first matching network, and

an algorithm implemented in the logic circuit for regulating and controlling the impedance of the first matching network and for monitoring control signals from the external circuit environment,

the method comprising:

causing the algorithm to always be active in a mode selected from at least two different active modes, wherein the at least two different active modes include a regulation mode for regulating the impedance of the first matching network, a control mode for controlling the impedance of the first matching network, or a monitoring mode for monitoring the control signals or any combination of the regulation mode, control mode, and the monitoring mode;

changing the mode of the algorithm to a different one of the at least two different active modes at an interval of time, wherein the control signals are monitored in the monitoring mode to determine which of the at least two active modes the algorithm is in;

controlling the impedance of the first matching network responsive to the mode of the algorithm being in the control mode; and

setting the impedance of the first matching network to a defined value responsive to the mode of the algorithm being in the regulation mode.

2. The method as claimed in claim 1, wherein the control mode is configured to adaptively match the impedance of the first matching network to the impedance of the first variable-impedance circuit, the method further comprising carrying out iteratively the following responsive to the mode of the algorithm being in the control mode:

responsive to the impedance of the first-variable impedance circuit changing, determining, in at least a first circuit, a new value of the impedance of the first matching network such that the new impedance of the first matching network matches the impedance of the first variable-impedance circuit; and

setting the impedance of the first matching network to the new value.

3. The method as claimed in claim 1, wherein the setting the defined of the impedance of the first matching network in the regulation mode is based on

the frequency band in which data are transmitted in the first signal path, or

the type of the first variable-impedance circuit element, the first variable-impedance circuit element being an external test circuit, a planar antenna, a planar inverted L antenna (PILA), a planar inverted F antenna (PIFA), a rod antenna, a power amplifier, or a receiving amplifier.

4. The method as claimed in claim 1, wherein the changing the mode using the control signals is based on:

a supply voltage which serves at least parts of electrical circuits in the external circuit environment or the impedance matching circuit,

the radiofrequency (RF) power fed into the signal path, or

the type of the first variable-impedance circuit element, the first variable-impedance circuit element being an external testing circuit, a planar antenna, a planar inverted L antenna (PILA), a planar inverted F antenna (PIFA), or a rod antenna.

5. The method as claimed in claim 1, further comprising synchronizing the controlling of the impedance of the first matching network with the control signals.

6. The method as claimed in claim 1, wherein the controlling the impedance of the first matching network is carried out in an asynchronous manner with respect to the control signals.

7. The method as claimed in claim 1, wherein the phase of the transmission signal changes less than or equal to 15°

responsive to the controlling the impedance of the first matching network.

8. The method as claimed in claim 1, wherein the variable-impedance circuit element is an antenna of a mobile communication device.

9. The method as claimed in claim 1, wherein the variable-impedance circuit element is a switching element that electrically connects the impedance matching circuit to an external test circuit.

10. The method as claimed in claim 1, wherein the first matching network includes a switching unit, the switching unit being

a switchable capacitance matrix using radiofrequency (RF) microelectromechanical systems (MEMS) technology,

a switchable capacitance matrix using complementary metal-oxide-semiconductor (CMOS) technology,

a switchable capacitance matrix using n-type metal-oxide-semiconductor (NMOS) or p-type metal-oxide-semiconductor (PMOS) technology,

a switchable capacitance matrix using gallium arsenide (GaAs) technology,

a switchable capacitance matrix using silicon-germanium (SiGe) technology,

a switchable capacitance element using barium strontium titanate (BST) technology,

a switchable capacitance element using bismuth zinc niobate (BZN) technology,

a switchable capacitance element using carbon technology,

a switchable capacitance element with graphene field-effect transistors (FETs),

a hyperabruptly doped varactor, or

a switching unit based on technologies that operate with ferroelectric materials.

11. The method as claimed in claim 1, the logic circuit being integrated in a microcontroller, in a baseband chipset, in a radiofrequency (RF) chipset, in an application-specific integrated circuit (ASIC), or in an integrated circuit (IC).

12. The method as claimed in claim 1, wherein the signal path includes radiofrequency (RF) signals propagating in succession or at the same time in a first frequency band and in a second frequency band that differs from the first frequency band.

13. The method as claimed in claim 1, wherein the impedance matching circuit is used in a multiband or multimode mobile radio device.

14. The method as claimed in claim 1, further comprising processing transmission or reception data in the signal path according to a modulation scheme, the modulation scheme being CW (Continuous Wave), GSM (Global System for Mobile communications), W-CDMA (Wide Band Code Division Multiple Access), LTE (Long Term Evolution), OFDM (Orthogonal Frequency Division Multiplex), QAM (Quadrature Amplitude Modulation), COFDM (Coded Orthogonal Frequency Division Multiplex), TCM (Trellis-Coded Modulation), BCM (Block Code Modulation), MLCM (Multilevel Code Modulation), BOC (Binary Offset Carrier), FHSS (Frequency Hopping Spread Spectrum), or DSSS (Direct-Sequence Spread Spectrum).

15. The method as claimed in claim 1, the impedance matching circuit also comprising:

a second signal line,

a second variable-impedance circuit element, and

a second matching network,

the second matching network being electrically connected to the second signal line and the second signal line being electrically connected to the second variable-impedance circuit element,

the impedance of the second matching network being regulated or controlled in order to match the impedance of the second signal line to the second variable-impedance circuit element.

16. The method as claimed in claim 15, further comprising:

controlling the impedance of the first or second matching network and regulating the impedance of the other matching network such that the impedance matching is optimal for the controlled matching network.