Apparatus and method for a fault-tolerant scalable switch fabric with quality-of-service (QOS) support

• US 8,165,112 B2
• Filed: 02/09/2009
• Issued: 04/24/2012
• Est. Priority Date: 11/27/2001
• Status: Expired due to Term

• Current Assignee: Tellabs San Jose, Inc. (Infinera Corp.)
• Original Assignee: Tellabs San Jose, Inc. (Infinera Corp.)
• Inventors: Menon, Raghavan, Goldstein, Adam, Griswold, Mark D., Issa, Mohammad K., Lehavot, Amir, Parvin, Shaham, Zheng, Xiaoyang, Halabi, Mitri I.
• Primary Examiner(s): Phillips, Hassan
• Assistant Examiner(s): Jones, Prenell P
• Application Number:
  US12/368,064
• Publication Number:
  US 20090201923A1
• Time in Patent Office: 1,170 Days
• Field of Search: 370/401, 370/388, 370/389, 370/398, 370/395, 370/400, 370/351, 370/445, 370/349, 348/14, 709/203, 709/205, 455/452
• US Class Current: 370/388
• CPC Class Codes: H04L 12/40058 Isochronous transmission
• CPC Class Codes: H04L 12/6418 Hybrid transport

Abstract

Embodiments of the present invention relate to portions of a switch fabric having a single logical stage and at least one physical stage. In addition, the data paths and the control paths of the switch fabric can be decoupled thereby allowing additional processing to be performed than would otherwise be the case with control rates that matched the high data rates. In other words, data cells received on high speed links can be spread over many lower speed links; consequently, the data cells can transit the switch fabric at that high speed while the control information associated with the data can be processed at that lower speed. Because the control information can be processed at a lower speed (associated with the control path), the control information can be processed over a greater period of time.

Claims

1. An apparatus for transferring data, comprising:

a plurality of switches, each comprising;

a scheduler arranged to examine request-to-sends (RTSs) received by the switch, and to determine which of plural sources of data will be allowed to send data to at least one destination for a given time slot, by grouping together the RTSs for each source and arbitrating each grouping of RTSs, and

an assembler arranged to assemble data provided from at least one of the sources, into data packets based on a determination made by the scheduler, and to forward assembled data packets to the at least one destination.

2. The apparatus of claim 1, wherein the scheduler determines which of plural sources will be allowed to send data by creating a mapping of which inputs will be routed to which outputs.

3. The apparatus of claim 1, wherein the scheduler determines which of the plural sources will be allowed to send data based on a round-robin methodology.

4. The apparatus of claim 1, further comprising a cell parser arranged to parse RTSs from data, and to forward the parsed RTSs towards the scheduler and the data towards the assembler.

5. The apparatus of claim 1, wherein data flow is effected in a predetermined order across the plurality of switches.

11. The apparatus of claim 1, further comprising a cell parser, arranged to parse cells into RTS, grant, flow control, and data payload portions, and to provide RTSs to the scheduler.

12. The apparatus of claim 1, wherein the scheduler performs RTS grouping, RTS arbitration and RTS time out.

13. The apparatus of claim 11, wherein the assembler reassembles cells from the data payload portions based on flow control information provided by the cell parser and the determination made by the scheduler.

14. The apparatus of claim 11, further comprising a deskew FIFO arranged to align cells by buffering them, and to provide the cells to the cell parser in time alignment.

15. The apparatus of claim 13, further comprising a time slot engine that buffers reassembled cells and provides them to cell framer outputs, wherein the time slot engine buffers reassembled cells until a cell for every cell framer output is received.

28. The apparatus of claim 1, wherein each of the plurality of switches further comprises:

a memory, arranged to

(a) accept data cells, including data from at least one of the plural sources of data, temporally offset from one another,

(b) compensate for discrepancies between times at which the data cells are accepted at the memory, and

(c) after all of the data cells are accepted at the memory, forward the data cells in a non-temporally offset manner such that the discrepancies between the times are removed.

29. The apparatus of claim 28, wherein the memory is a deskew FIFO.

30. The apparatus of claim 28, wherein the at least one of the plural data sources includes one of at least one framer and at least one fabric gateway.

6. A method for transferring data, comprising:

examining request-to-sends (RTSs) to determine which of plural sources of data will be allowed to send data to at least one destination for a given time slot, by grouping together the RTSs for each source and arbitrating each grouping of RTSs;

assembling data provided from at least one of the sources, into data packets based on a determination result obtained in the examining; and

forwarding assembled data packets to the at least one destination.

7. The method of claim 6, wherein determination of which of the plural sources will be allowed to send data is performed by creating a mapping of which inputs will be routed to which outputs.

8. The method of claim 6, wherein determination of which of the plural sources will be allowed to send data is performed based on a round-robin methodology.

9. The method of claim 6, further comprising parsing RTSs from data.

10. The method of claim 8, further comprising buffering the assembled data packets until a data packet has been received for every one of a plurality of packet framer outputs.

16. The method of claim 6, wherein the examining includes performing RTS grouping, RTS arbitration and RTS time out.

17. The method of claim 6, further comprising parsing cells into RTS, grant, flow control, and data payload portions, and providing RTSs for the examining.

18. The method of claim 17, wherein the assembling includes reassembling cells from the data payload portions based on flow control information provided by the cell parser and the result of the examining.

19. The method of claim 17, further comprising aligning cells by buffering them, and providing the cells in time alignment, for being parsed.

20. The method of claim 18, further comprising buffering reassembled cells and providing them to cell framer outputs, wherein the buffering buffers reassembled cells until a cell for every cell framer output is received.

21. The method of claim 6, further comprising:

accepting data cells, including data from at least one of the plural sources of data, temporally offset from one another at a memory;

compensating for discrepancies between times at which the data cells are accepted at the memory; and

after all of the data cells are accepted at the memory, forwarding the data cells in a non-temporally offset manner such that the discrepancies between the times are removed.

22. The method of claim 21, wherein the memory is a deskew FIFO.

23. The method of claim 21, wherein the compensating includes buffering at least one of the data cells.

24. The method of claim 21, further comprising:

determining whether connections between at least one framer and the memory are non-operational by keeping track of a time-out period.

25. The method of claim 24, further comprising:

inserting at least one idle cell for a connection determined to be non-operational.

26. The method of claim 24, wherein the data cells are provided from the at least one framer at different clock timings.

27. The method of claim 21, further comprising:

periodically instructing at least one of the plural sources to send additional data cells to the memory.