Capacitance to frequency converter

• US 8,169,238 B1
• Filed: 07/01/2008
• Issued: 05/01/2012
• Est. Priority Date: 07/03/2007
• Status: Active Grant

• Current Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Kremin, Viktor, Maharyta, Andriy
• Primary Examiner(s): Donovan, Lincoln
• Assistant Examiner(s): CHENG, DIANA
• Application Number:
  US12/166,228
• Time in Patent Office: 1,400 Days
• Field of Search: 327/101, 327/336, 327/337, 331/1.A, 331/1.R, 331/8, 331/16, 331/17, 331/108.R, 324/658
• US Class Current: 327/101
• CPC Class Codes: G01D 5/24 by varying capacitance
• CPC Class Codes: G01R 27/2605 Measuring capacitance capacitive sensors G01D5/24
• CPC Class Codes: H03K 17/955 using a capacitive detector
• CPC Class Codes: H03K 2217/960725 Charge-transfer
• CPC Class Codes: H03K 2217/96074 Switched capacitor

Abstract

A capacitance to frequency converter includes a switching capacitor circuit, a charge dissipation circuit, a comparator, and a signal generator. The switching capacitor circuit charges a sensing capacitor and transfers charge from the sensing capacitor to a circuit node of the charge dissipation circuit. The comparator is coupled to the charge dissipation circuit to compare a potential at the circuit node to a reference voltage. The signal generator is coupled to an output of the comparator and to the charge dissipation circuit. The signal generator is responsive to the output of the comparator to generate a signal fed back to control the charge dissipation circuit. A frequency of the signal is proportional to a capacitance of the sensing capacitor.

Claims

1. A capacitance to frequency converter, comprising:

a switching capacitor circuit to charge a sensing capacitor and to transfer charge from the sensing capacitor to a charge dissipation circuit via a circuit node;

a comparator coupled to the charge dissipation circuit to compare a potential at the circuit node to a reference voltage; and

a signal generator coupled to an output of the comparator and to the charge dissipation circuit, the signal generator responsive to the output of the comparator to generate a signal fed back to control the charge dissipation circuit, wherein a frequency of the signal is proportional to a capacitance of the sensing capacitor, and wherein the charge dissipation circuit comprises a modulation capacitor coupled to the circuit node and a current source coupled to selectively discharge the modulation capacitor in response to the signal.

2. The capacitance to frequency converter of claim 1, wherein the signal generator comprises a pulse generator and the signal comprises a pulse signal.

3. The capacitance to frequency converter of claim 2, wherein the pulse generator generates a zero level fixed length pulse having a period between adjacent fixed length pulses modulated by the output of the comparator.

4. The capacitance to frequency converter of claim 2, further comprising a frequency measurement circuit coupled to the pulse generator to measure a frequency of the pulse signal.

5. The capacitance to frequency converter of claim 1, wherein the charge dissipation circuit comprises:

a modulation capacitor coupled to the circuit node;

a charge dissipation resistor; and

a discharging switch coupled in series with the charge dissipation resistor to selectively discharge the modulation capacitor through the charge dissipation resistor in response to the signal.

6. The capacitance to frequency converter of claim 5, wherein the switching capacitor circuit further comprises:

a charging switch coupled to selectively charge the sensing capacitor; and

a charge transfer switch coupled between the sensing capacitor and the modulation capacitor to selectively transfer charge from the sensing capacitor to the modulation capacitor.

7. The capacitance to frequency converter of claim 6, further comprising a clocking circuit coupled to operate the charging switch and the charge transfer switch in two non-overlapping phases.

8. The capacitance to frequency converter of claim 1, wherein the comparator comprises an analog comparator.

9. The capacitance to frequency converter of claim 1, wherein the charge dissipation circuit comprises:

a modulation capacitor coupled to the circuit node;

a switching capacitor resistor circuit coupled between the circuit node and a ground; and

a clock source gated by the signal coupled to control the switching capacitor resistor circuit.

10. The capacitance to frequency converter of claim 1, wherein the charge dissipation circuit comprises:

a modulation capacitor coupled to the circuit node; and

a switching capacitor resistor circuit coupled to the circuit node and having two switches selectively coupled in series between the circuit node and either a ground or the reference voltage dependent upon the signal.

11. A method of converting a capacitance value to a frequency value, the method comprising:

reciprocally switching charge into a first capacitor having the capacitance value and out of the first capacitor into a second capacitor;

selectively modulating a frequency of a pulse signal in response to the charge accumulated on the second capacitor; and

selectively discharging the charge from the second capacitor in response to the pulse signal.

12. The method of claim 11, wherein selectively modulating the frequency of the pulse signal comprises:

comparing a voltage potential on the second capacitor to a reference voltage potential;

generating a modulation signal dependent upon whether the voltage potential is greater or less than the reference voltage; and

modulating the frequency of the pulse signal based on the modulation signal.

13. The method of claim 12, wherein modulating the frequency of the pulse signal comprises modulating a period between fixed length pulses.

14. The method of claim 13, wherein modulating the frequency of the pulse signal further comprises:

selectively enabling a pulse generator in response to the modulation signal;

generating the pulse signal with a minimal fixed period when the modulation signal is in a first state; and

generating the pulse signal having a fixed logic level between the fixed length pulses while the modulation signal is in a second state.

15. The method of claim 14, wherein modulating the period between the fixed length pulses comprises completing generation of a current one of the fixed length pulses prior to reverting to the fixed logic level after the modulation signal transitions to the second state.

16. The method of claim 11, wherein reciprocally switching charge into the first capacitor having the capacitance value and out of the first capacitor into the second capacitor comprises two non-overlapping switching phases.

17. An apparatus, comprising:

a switching capacitor circuit to charge a first capacitor and to transfer charge between the first capacitor and a modulation capacitor;

a comparator coupled to the modulation capacitor to compare a potential on the modulation capacitor to a first voltage and to generate a modulation signal;

a pulse generator coupled to the comparator to receive the modulation signal and to generate a feedback signal responsive to the modulation signal; and

a discharging circuit coupled to selectively discharge the modulation capacitor responsive to the feedback signal.

18. The apparatus of claim 17, wherein an enable input of the pulse generator is coupled to the modulation signal generated by the comparator.

19. The apparatus of claim 17, wherein the discharging circuit comprises:

a charge dissipation resistor; and

a discharging switch coupled in series with the charge dissipation resistor to selectively discharge the modulation capacitor through the charge dissipation resistor in response to the feedback signal.

20. The apparatus of claim 17, further comprising a frequency measurement circuit coupled to the pulse generator to measure a frequency of the feedback signal, wherein the feedback signal comprises a pulse signal and wherein the frequency is proportional to a capacitance of the sensing capacitor.

21. The apparatus of claim 17, wherein in the switching capacitor circuit further comprises:

a charging switch coupled to selectively charge the sensing capacitor; and

a charge transfer switch coupled between the sensing capacitor and the modulation capacitor to selectively transfer charge from the sensing capacitor to the modulation capacitor.

22. The apparatus of claim 21, further comprising a clocking circuit coupled to operate the charging switch and the charge transfer switch in two non-overlapping phases.