Multi-transformer architecture for an active RF circuit

• US 8,170,522 B2
• Filed: 11/09/2007
• Issued: 05/01/2012
• Est. Priority Date: 11/15/2006
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: SiBEAM, Inc. (Lattice Semiconductor Corporation)
• Inventors: Guan, Xiang, Doan, Chinh Huy, Emami-Neyestanak, Sohrab
• Primary Examiner(s): Ghebretinsae, Temesgh
• Assistant Examiner(s): Chan, Richard
• Application Number:
  US11/938,126
• Publication Number:
  US 20080113643A1
• Time in Patent Office: 1,635 Days
• Field of Search: 455/326, 455/330, 455/333, 455/327
• US Class Current: 455/330
• CPC Class Codes: H01P 5/10 for coupling balanced lines or devices with unbalanced lines or devices
• CPC Class Codes: H03D 2200/0023 Balun circuits
• CPC Class Codes: H03D 7/1433 using bipolar transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1441 using field-effect transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1458 Double balanced arrangements, i.e. where both input signals are differential
• CPC Class Codes: H03H 7/09 Filters comprising mutual inductance
• CPC Class Codes: H03H 7/42 Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
• CPC Class Codes: H04L 25/0266 Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling
• CPC Class Codes: H04L 25/0274 Arrangements for ensuring balanced coupling
• CPC Class Codes: H04L 25/0276 Arrangements for coupling common mode signals

Abstract

A circuit features a balun having an unbalanced input and a balanced output, and a differential coupler having a symmetrical structure about a center axis. The differential coupler has a differential input and a differential output, the differential input being coupled to the balanced output of the balun. An impedance element is coupled to a circuit node of the differential coupler at a point along the center axis. Other embodiments are also described and claimed.

Claims

1. A circuit comprising:

a balun having an unbalanced input and a balanced output;

a differential coupler having a symmetrical structure about a center axis including first and second transformers that are replicates and that are positioned on opposite sides of the center axis, the differential coupler having a differential input and a differential output, the differential input being coupled to the balanced output of the balun; and

an impedance element coupled to a circuit node of the differential coupler at a point along the center axis said circuit node being common to the first and second transformers, wherein the impedance element couples said circuit node to AC ground for the circuit.

2. The circuit of claim 1 further comprising:

an active circuit having a differential input coupled to the differential output of the coupler, wherein impedance looking into the differential input of the active circuit has a negative resistance component over a frequency range of operation,

and wherein the impedance element has a positive resistance component that is greater than the absolute value of the negative resistance component somewhere in said frequency range of operation.

3. The circuit of claim 2 wherein the frequency range of operation is somewhere between 46 GHz and 52 GHz.

4. The circuit of claim 2 further comprising an impedance matching network coupled between the differential output of the differential coupler and the differential input of the active circuit.

5. The circuit of claim 2 further comprising an impedance matching network coupled between the balanced output of the balun and the differential input of the differential coupler.

6. The circuit of claim 2 wherein the active circuit comprises a mixer, and the differential input of the active circuit is a local oscillator port of the mixer.

7. The circuit of claim 2 wherein the balun and the differential coupler are adapted to operate above 1 GHz.

8. The circuit of claim 1 further comprising:

a capacitor coupled in series with the impedance element; and

a DC bias generator circuit coupled to a node that is common to the impedance element and the capacitor.

9. A circuit comprising:

a balun having a pair of transmission lines that make up its differential output;

a first coupled line pair one line of which has one end conductively coupled to one of the transmission lines of the balun;

a second coupled line pair one line of which has one end conductively coupled to the other one of the transmission lines of the balun, the first and second coupled line pairs forming a symmetrical structure about a center axis;

the other line of the first pair has one end coupled to a node and another end being one half of a differential output of the circuit;

the other line of the second pair has one end that is coupled to the node that is on the center axis, and another end being the other half of the differential output of the circuit; and

an impedance element having one end coupled to the node and another end coupled to AC ground of the circuit.

10. The circuit of claim 9 wherein the impedance element is a lumped resistor.

11. The circuit of claim 9 wherein the impedance element couples the node to ac ground somewhere in the range 10 GHz-100 GHz.

12. The circuit of claim 9 wherein the balun and the first and second coupled line pairs are adapted to operate above 30 GHz.

13. The circuit of claim 9 further comprising:

a capacitor coupled in series with the impedance element; and

a DC bias generator circuit coupled to a node that is common to the impedance element and the capacitor.

14. A circuit comprising:

a first transformer having an unbalanced input and a balanced output;

a second transformer having a balanced input coupled to the balanced output of the first transformer, the second transformer having a symmetrical structure about a center axis and a balanced output;

an impedance element having one end coupled to a circuit node of the second transformer at a point along the center axis and another end coupled to ground; and

a target circuit having a balanced input coupled to the balanced output of the second transformer.

15. The circuit of claim 14 wherein

the impedance element has a resistive component that is greater than the absolute value of a negative resistive component of input impedance of the target circuit somewhere in a frequency range.

16. The circuit of claim 15 wherein the frequency range is above 30 GHz.

17. The circuit of claim 14 further comprising:

a third transformer coupled between the first transformer and the second transformer, so that its balanced input is coupled to the balanced output of the first transformer and its balanced output is coupled to the balanced input of the second transformer.

18. The circuit of claim 17 wherein

the impedance element has a resistive component that is greater than the absolute value of a negative resistive component of input impedance of the target circuit somewhere in a frequency range.

19. The circuit of claim 18 wherein the frequency range is above 30 GHz.

20. An electronic system comprising:

a millimeter wave beam forming antenna array circuit having

a mixer with an RF port coupled to an antenna array, and

a single-ended to differential transformer circuit having a balun with an unbalanced input and a balanced output adapted to operate somewhere in the range 45 GHz-66 GHz, a differential coupler with a symmetrical structure about a center axis and that contains first and second transformers which are replicates and that are positioned on opposite sides of the center axis, the differential coupler having a differential input and a differential output, the differential input being coupled to the balanced output of the balun, the differential output being coupled to an LO input of the mixer, and an impedance element coupled to a circuit node of the differential coupler that is common to the first and second transformers, wherein the impedance element couples said circuit node to ac ground.

21. The system of claim 20 wherein the mixer and single-ended to differential transformer circuit are integrated in a CMOS-processed chip.

22. The system of claim 21 in combination with a consumer product grade audio and/or video digital media receiver, wherein the mixer is an up-conversion device that receives an audio and video stream from the media receiver and transfers the stream to higher frequencies for transmission by the antenna array.

23. The system of claim 21 in combination with a consumer product grade audio and/or video digital media player, wherein the mixer is a down-conversion device that is to transfer an audio and/or video stream received by the antenna array to lower frequencies and sends the audio and/or video stream to the media player for playback.

24. A circuit comprising:

a balun having an unbalanced input and a balanced output;

a differential coupler having a symmetrical structure about a center axis, the differential coupler having a differential input and a differential output, the differential input being coupled to the balanced output of the balun;

an impedance element coupled to a circuit node of the differential coupler at a point along the center axis;

an active circuit having a differential input coupled to the differential output of the coupler, wherein impedance looking into the differential input of the active circuit has a negative resistance component over a frequency range of operation,

and wherein the impedance element has a positive resistance component that is greater than the absolute value of the negative resistance component somewhere in said frequency range of operation.

25. The circuit of claim 24 wherein the frequency range of operation is somewhere between 46 GHz and 52 GHz.

26. The circuit of claim 24 wherein the active circuit comprises a mixer, and the differential input of the active circuit is a local oscillator port of the mixer.

27. The circuit of claim 24 further comprising:

a capacitor coupled in series with the impedance element; and

a DC bias generator circuit coupled to a node that is common to the impedance element and the capacitor.

28. A circuit comprising:

a first transformer having an unbalanced input and a balanced output;

a second transformer having a balanced input coupled to the balanced output of the first transformer, the second transformer having a symmetrical structure about a center axis and a balanced output;

an impedance element having one end coupled to a circuit node of the second transformer at a point along the center axis and another end coupled to ground; and

a target circuit having a balanced input coupled to the balanced output of the second transformer, wherein the impedance element has a resistive component that is greater than the absolute value of a negative resistive component of input impedance of the target circuit somewhere in a frequency range.

29. The circuit of claim 28 wherein the frequency range is above 30 GHz.

30. The circuit of claim 28 further comprising:

a third transformer coupled between the first transformer and the second transformer, so that its balanced input is coupled to the balanced output of the first transformer and its balanced output is coupled to the balanced input of the second transformer.