Multi-level memory access in an optical transceiver

• US 8,200,095 B2
• Filed: 03/07/2005
• Issued: 06/12/2012
• Est. Priority Date: 03/05/2004
• Status: Active Grant

• Current Assignee: II-VI Delaware, Inc. (Coherent Corp.)
• Original Assignee: Finisar Corporation (II-VI Incorporated)
• Inventors: Dybsetter, Gerald L., Hahin, Jayne C.
• Primary Examiner(s): Vanderpuye, Kenneth N
• Assistant Examiner(s): WOLDEKIDAN, HIBRET ASNAKE
• Application Number:
  US11/073,827
• Publication Number:
  US 20050196165A1
• Time in Patent Office: 2,654 Days
• Field of Search: 398/22, 398/128, 398/135, 398/136, 398/137, 398/138, 398/139, 398/107, 398/115
• US Class Current: 398/135
• CPC Class Codes: G06F 12/1425 the protection being physical, e.g. cell, word, block
• CPC Class Codes: G06F 12/1466 Key-lock mechanism
• CPC Class Codes: G06F 12/1483 using an access-table, e.g. matrix or list
• CPC Class Codes: G06F 12/1491 in a hierarchical protection system, e.g. privilege levels, memory rings

Abstract

A mechanism that enables an optical transceiver to grant access to its memory on a per-segment basis. The optical transceiver includes a processor, system memory and a memory access table. The memory access table is comprised of access entries, each of which defines the access condition for a corresponding segment of memory. The processor reads the access entries for a particular segment of the memory. The processor or other optical transceiver component then determines whether or not to grant access to the memory segment based on the access entry read by the processor. Different levels of access control may be accommodated.

Claims

1. A method of granting access to a system memory of an optical transceiver, the method comprising:

an act of receiving a request from an external host processor for access privileges to at least one segment of the system memory of the optical transceiver;

in response to receiving the request for access privileges for the external host processor;

an act of a processing entity reading a first access entry of a memory access table of the optical transceiver, the first access entry defining an address of a first segment of the system memory of the optical transceiver and a first access condition for accessing the first segment of the system memory of the optical transceiver;

an act of the processing entity determining external host processor access privileges for the first segment of the system memory of the optical transceiver based on the first access condition read;

an act of the processing entity reading a second access entry of the memory access table, the second access entry defining an address of a second segment of the system memory of the optical transceiver and a second access condition for accessing the second segment of the system memory of the optical transceiver, wherein satisfaction of the second access condition satisfies the first access condition but satisfaction of the first access condition does not satisfy the second access condition; and

an act of the processing entity determining external host processor access privileges for the second segment of the system memory of the optical transceiver based on the second access condition read,

wherein the second segment of system memory stores at least a portion of code used to control an internal function of the optical transceiver, the internal function including at least one of evaluating operational circumstances of the optical transceiver and adjusting settings of a post amplifier and/or a laser driver in the optical transceiver, and

wherein the request received from the external host processor includes data written to a third segment of the system memory prior to determining external host processor access privileges for the first or second segments of the system memory of the optical transceiver.

2. A method in accordance with claim 1, wherein the memory access table comprises a plurality of hierarchical memory access tables.

3. A method in accordance with claim 2, wherein the plurality of hierarchical memory access tables include one or more low-level memory access tables.

4. A method in accordance with claim 3, wherein one or more of the plurality of hierarchical memory access tables include indexes indexing into one or more low-level memory access tables.

5. A method in accordance with claim 1, wherein the processing entity is a state machine.

6. A method in accordance with claim 1, wherein the memory access table contains access conditions for accessing segments of the system memory utilized by at least two separate devices.

7. A method in accordance with claim 1, wherein the first access condition defines whether the external host processor may read corresponding first segment of the system memory of the optical transceiver.

8. A method in accordance with claim 1, wherein the first access condition defines whether the external host processor may write to the corresponding first segment of the system memory of the optical transceiver.

9. A method in accordance with claim 1, wherein the external host processor requests access privileges by providing a password to the optical transceiver.

10. A method in accordance with claim 9, wherein the optical transceiver compares the received password with the first access condition.

11. An optical transceiver in accordance with claim 1, wherein the memory access table includes a configuration entry defining configuration settings for a particular segment in the system memory of the optical transceiver, the configuration settings for the particular segment defining whether or not a write to the particular segment should trigger a processor interrupt in which in response to determining that an original value of the segment has been overwritten by the new value, the processor interrupt is triggered based on the configuration settings and the segment is restored to the original value.

12. An optical transceiver communicatively coupled to an external host processor, the optical transceiver comprising:

a control module configured to perform one or more control functions including evaluating operational circumstances of the optical transceiver and/or adjusting settings of a post amplifier and/or a laser driver in the optical transceiver, the control module including;

a processing entity;

a system memory divided into memory segments to enable access to the memory on a per-segment basis;

a memory access table having a plurality of access entries, each access entry for defining an access condition for a corresponding memory segment of the system memory;

wherein granting access to the system memory of the optical transceiver comprises;

receiving a request from the external host processor for access privileges to at least one segment of the system memory of the optical transceiver, the at least one segment of the system memory storing code used by the control module to perform the one or more control functions;

in response to receiving the request for access privileges for the external host processor;

the processing entity reading a first access entry defining a first access condition for accessing a first segment of the system memory of the optical transceiver;

the processing entity determining host processor access privileges for the first segment of the system memory of the optical transceiver based on the first access condition read;

the processing entity reading a second access entry defining a second access condition for accessing a second segment of the system memory of the optical transceiver, wherein satisfaction of the second access condition satisfies the first access condition but satisfaction of the first access condition does not satisfy the second access condition; and

the processing entity determining host processor access privileges for the second segment of the system memory of the optical transceiver based on the second access condition read,

wherein the memory access table contains access conditions for accessing segments of the system memory utilized by at least two separate devices.

13. An optical transceiver in accordance with claim 12, wherein the memory access table comprises a plurality of hierarchical memory access tables.

14. An optical transceiver in accordance with claim 13, wherein the plurality of hierarchical memory access tables include one or more low-level memory access tables.

15. An optical transceiver in accordance with claim 14, wherein one or more of the plurality of hierarchical memory access tables include indexes indexing into one or more low-level memory access tables.

16. An optical transceiver in accordance with claim 12, wherein the processing entity is a state machine.

17. An optical transceiver in accordance with claim 12, wherein the first access condition defines whether the external host processor may read the corresponding first segment of the system memory of the optical transceiver.

18. An optical transceiver in accordance with claim 12, wherein the first access condition defines whether the external host processor may write to the corresponding first segment of the system memory of the optical transceiver.

19. An optical transceiver in accordance with claim 12, wherein the external host processor requests access privileges by providing a password to the optical transceiver.

20. An optical transceiver in accordance with claim 19, wherein the optical transceiver compares the received password with the first access condition.

21. An optical transceiver communicatively coupled to a local host external to the optical transceiver, the optical transceiver comprising:

a processing entity;

a system memory divided into memory segments to enable access to the memory on a per-segment basis; and

a memory access table having a plurality of access entries, each access entry for defining an access condition for a corresponding memory segment of the system memory, wherein the memory access table contains access conditions for accessing segments of the system memory utilized by at least two separate devices,

wherein the optical transceiver has a form factor that complies with a standard optical transceiver form factor definition so as to fit within a standard-sized opening of the local, external host and to provide a communications interface between the local, external host and other nodes in a network, and

wherein granting access to the system memory of the optical transceiver comprises;

receiving a request from the local external host for access privileges to at least one segment of the system memory of the optical transceiver;

in response to receiving the request for access privileges for the local, external host;

the processing entity reading a first access entry defining a first access condition for accessing a first segment of the system memory of the optical transceiver;

the processing entity determining host processor access privileges for the first segment of the system memory of the optical transceiver based on the first access condition read;

the processing entity reading a second access entry defining a second access condition for accessing a second segment of the system memory of the optical transceiver, wherein satisfaction of the second access condition satisfies the first access condition but satisfaction of the first access condition does not satisfy the second access condition; and

the processing entity determining host processor access privileges for the second segment of the system memory of the optical transceiver based on the second access condition read,

wherein the first and second access conditions each comprise a one byte entry in the memory access table, and

wherein the request received from the local, external host includes data written to a third segment of the system memory prior to determining host processor access privileges for the first or second segments of the system memory of the optical transceiver.

22. An optical transceiver in accordance with claim 21, wherein the standard optical transceiver form factor definition is one of XFP, SFP, and SFF.

23. An optical transceiver in accordance with claim 21, wherein the optical transceiver is configured to interface with the local, external host via a serial clock line and a serial data line.

24. An optical transceiver in accordance with claim 23, wherein the optical transceiver is configured to provide digital diagnostics data to the host via the serial data line, the digital diagnostics data including at least one of a temperature level reading, a transmit power level reading, and a receive power level reading.