Method of making a semiconductor chip assembly with a post/base/post heat spreader and asymmetric posts

• US 8,207,019 B2
• Filed: 02/20/2011
• Issued: 06/26/2012
• Est. Priority Date: 03/25/2008
• Status: Expired due to Fees

• Current Assignee: Bridge Semiconductor Corporation
• Original Assignee: Bridge Semiconductor Corporation
• Inventors: Lin, Charles W. C., Wang, Chia-Chung
• Primary Examiner(s): Wagner, Jenny L
• Assistant Examiner(s): Boyle, Abbigale
• Application Number:
  US13/031,222
• Publication Number:
  US 20110151626A1
• Time in Patent Office: 492 Days
• Field of Search: 438/26, 438/27, 438/122, 438/612, 438/39, 257/684, 257/712, 257/99, 257/711, 257/717, 257/706, 257/707, 257/E33.056
• US Class Current: 438/122
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/29339 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/32013 the layer connector being larger than the bonding area, e.g. bond pad
• CPC Class Codes: H01L 2224/32188 the layer connector connecting to a bonding area protruding from the surface of the item
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83855 Hardening the adhesive by curing, i.e. thermosetting
• CPC Class Codes: H01L 2224/85205 Ultrasonic bonding
• CPC Class Codes: H01L 2224/85207 Thermosonic bonding
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/85 : using a wire connector wire bonding in general B23K20/004
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01012 : Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01077 : Iridium [Ir]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01087 : Francium [Fr]
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/20105 : Temperature range 150 C=<T<200 C, 423.15 K =< T < 473.15K
• CPC Class Codes: H01L 2933/0033 : relating to semiconductor body packages
• CPC Class Codes: H01L 2933/0075 : relating to heat extraction or cooling elements
• CPC Class Codes: H01L 33/486 : adapted for surface mounting
• CPC Class Codes: H01L 33/62 : Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: H01L 33/642 : characterized by the shape
• CPC Class Codes: H05K 1/0204 : using means for thermal conduction connection in the thickness direction of the substrate H05K1/0207 takes precedence
• CPC Class Codes: H05K 1/056 : the metal substrate being covered by an organic insulating layer
• CPC Class Codes: H05K 2201/09054 : Raised area or protrusion of metal substrate
• CPC Class Codes: H05K 2201/09181 : Notches in edge pads
• CPC Class Codes: H05K 2201/10106 : Light emitting diode [LED]
• CPC Class Codes: H05K 2203/0369 : Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
• CPC Class Codes: H05K 3/0061 : onto a metallic substrate, e.g. a heat sink heat sinks for electric apparatus H05K7/20
• CPC Class Codes: H05K 3/445 : having insulated holes or insulated via connections through the metal core

Abstract

A method of making a semiconductor chip assembly includes providing first and second posts, first and second adhesives and a base, wherein the first post extends from the base in a first vertical direction into a first opening in the first adhesive and is located within a periphery of the second post, the second post extends from the base in a second vertical direction into a second opening in the second adhesive and the base is sandwiched between and extends laterally from the posts, then flowing and solidifying the adhesives, then providing a conductive trace that includes a pad and a terminal, wherein the pad extends beyond the base in the first vertical direction and the terminal extends beyond the base in the second vertical direction, providing a heat spreader that includes the posts and the base, then mounting a semiconductor device on the first post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Claims

1. A method of making a semiconductor chip assembly, comprising:

providing a first post, a second post, a first adhesive, a second adhesive and a base, wherein

the first post is adjacent to the base, extends vertically from the base in a first vertical direction and extends into a first opening in the first adhesive,

the second post is adjacent to the base, extends vertically from the base in a second vertical direction opposite the first vertical direction and extends into a second opening in the second adhesive,

the first adhesive contacts the base, extends vertically beyond the base in the first vertical direction and is non-solidified,

the second adhesive contacts the base, extends vertically beyond the base in the second vertical direction and is non-solidified,

the base is sandwiched between the posts and between the adhesives and extends laterally from the posts in lateral directions orthogonal to the vertical directions, and

the first post and the first opening are located within a periphery of the second post;

then

flowing the first adhesive;

flowing the second adhesive;

solidifying the adhesives;

then

depositing a first plated layer on the first post and the first adhesive, wherein the first plated layer covers the first post in the first vertical direction;

depositing a second plated layer on the second post and the second adhesive, wherein the second plated layer covers the second post in the second vertical direction;

providing a conductive trace that includes a pad, a terminal and an electrical interconnect, wherein the pad extends vertically beyond the base in the first vertical direction and includes a selected portion of the first plated layer, the terminal extends vertically beyond the base in the second vertical direction and includes a selected portion of the second plated layer, the electrical interconnect extends through the adhesives and the base and is spaced from and electrically isolated from the base and an electrically conductive path between the pad and the terminal includes the electrical interconnect;

providing a heat spreader that includes the posts and the base;

then

mounting a semiconductor device on the first post, wherein the semiconductor device extends vertically beyond the base in the first vertical direction, extends laterally within peripheries of the posts and the first post is sandwiched between the semiconductor device and the base;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the first post, thereby thermally connecting the semiconductor device to the second post.

2. The method of claim 1, wherein providing the posts and the base includes:

providing a metal plate;

forming a first etch mask on the metal plate that selectively exposes the metal plate in the first vertical direction and defines the first post;

forming a second etch mask on the metal plate that selectively exposes the metal plate in the second vertical direction and defines the second post;

then

etching the metal plate in a first pattern defined by the first etch mask and a second pattern defined by the second etch mask, thereby forming a first recess in the metal plate that extends into but not through the metal plate and a second recess in the metal plate that extends into but not through the metal plate, wherein the first post includes an unetched portion of the metal plate that protrudes beyond the base in the first vertical direction and is laterally surrounded by the first recess, the second post includes an unetched portion of the metal plate that protrudes beyond the base in the second vertical direction and is laterally surrounded by the second recess and the base includes an unetched portion of the metal plate that is sandwiched between the posts and between the recesses; and

then

removing the etch masks.

3. The method of claim 1, wherein:

providing the first adhesive includes providing a first prepreg with a first uncured epoxy and providing the second adhesive includes providing a second prepreg with a second uncured epoxy;

flowing the first adhesive includes melting the first uncured epoxy and compressing the first uncured epoxy and flowing the second adhesive includes melting the second uncured epoxy and compressing the second uncured epoxy; and

solidifying the first adhesive includes curing the first uncured epoxy and solidifying the second adhesive includes curing the second uncured epoxy.

4. The method of claim 1, including:

contacting a first release sheet and the first adhesive, wherein the first adhesive contacts and is sandwiched between the first release sheet and the base, then flowing and solidifying the first adhesive, then removing the first release sheet from the first adhesive, then depositing a first conductive layer on the first adhesive and then providing the conductive trace with a selected portion of the first conductive layer; and

contacting a second release sheet and the second adhesive, wherein the second adhesive contacts and is sandwiched between the second release sheet and the base, then flowing and solidifying the second adhesive, then removing the second release sheet from the second adhesive, then depositing a second conductive layer on the second adhesive and then providing the conductive trace with a selected portion of the second conductive layer.

5. The method of claim 1, including:

contacting a first conductive layer and the first adhesive, then flowing the first adhesive into a first aperture that extends through the first conductive layer alone and then providing the conductive trace with a selected portion of the first conductive layer; and

contacting a second conductive layer and the second adhesive, then flowing the second adhesive into a second aperture that extends through the second conductive layer alone and then providing the conductive trace with a selected portion of the second conductive layer.

6. The method of claim 1, including:

contacting a first dielectric layer and the first adhesive, wherein the first dielectric layer contacts and is sandwiched between a first conductive layer and the first adhesive and is solidified, then flowing the first adhesive into a first aperture that extends through the first conductive layer and the first dielectric layer and then providing the conductive trace with a selected portion of the first conductive layer; and

contacting a second dielectric layer and the second adhesive, wherein the second dielectric layer contacts and is sandwiched between a second conductive layer and the second adhesive and is solidified, then flowing the second adhesive into a second aperture that extends through the second conductive layer and the second dielectric layer and then providing the conductive trace with a selected portion of the second conductive layer.

7. The method of claim 1, wherein providing the pad includes removing selected portions of a first conductive layer that contacts the first adhesive after solidifying the adhesives.

8. The method of claim 1, wherein providing the terminal includes removing selected portions of a second conductive layer that contacts the second adhesive after solidifying the adhesives.

9. The method of claim 1, wherein mounting the semiconductor device includes providing a first solder joint between the semiconductor device and the pad and a second solder joint between the semiconductor device and the first post, electrically connecting the semiconductor device includes providing the first solder joint between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the second solder joint between the semiconductor device and the first post.

10. The method of claim 1, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the first post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the first post.

51. The method of claim 1, 11, 26 or 41, wherein the pad is located outside the periphery of the first post and extends laterally within the periphery of the second post.

52. The method of claim 1, 11, 26 or 41, wherein the pad is located outside the periphery of the first post and extends laterally within the periphery of the second post and the terminal is located outside the peripheries of the posts.

11. A method of making a semiconductor chip assembly, comprising:

providing a first post, a second post, a first adhesive, a second adhesive, a first conductive layer, a second conductive layer and a base, wherein

the first post is adjacent to and integral with the base, extends vertically from the base in a first vertical direction, extends into a first opening in the first adhesive and is aligned with a first aperture in the first conductive layer,

the second post is adjacent to and integral with the base, extends vertically from the base in a second vertical direction opposite the first vertical direction, extends into a second opening in the second adhesive and is aligned with a second aperture in the second conductive layer,

the first adhesive contacts the base, is sandwiched between the base and the first conductive layer, extends vertically beyond the base in the first vertical direction and is non-solidified,

the second adhesive contacts the base, is sandwiched between the base and the second conductive layer, extends vertically beyond the base in the second vertical direction and is non-solidified,

the first conductive layer extends vertically beyond the first adhesive in the first vertical direction,

the second conductive layer extends vertically beyond the second adhesive in the second vertical direction,

the base is sandwiched between the posts, between the adhesives and between the conductive layers and extends laterally from the posts in lateral directions orthogonal to the vertical directions, and

the first post, the first opening and the first aperture are located within a periphery of the second post;

then

flowing the first adhesive in the first vertical direction into a first gap located in the first aperture between the first post and the first conductive layer;

flowing the second adhesive in the second vertical direction into a second gap located in the second aperture between the second post and the second conductive layer;

solidifying the adhesives, thereby mechanically attaching the first conductive layer to the first post and the base using the first adhesive and mechanically attaching the second conductive layer to the second post and the base using the second adhesive;

then

depositing a first plated layer on the first post, the first adhesive and the first conductive layer, wherein the first plated layer covers the first post in the first vertical direction;

depositing a second plated layer on the second post, the second adhesive and the second conductive layer, wherein the second plated layer covers the second post in the second vertical direction;

providing a conductive trace that includes a pad, a terminal and an electrical interconnect, wherein the pad extends vertically beyond the base in the first vertical direction and includes selected portions of the first conductive layer and the first plated layer, the terminal extends vertically beyond the base in the second vertical direction and includes selected portions of the second conductive layer and the second plated layer, the electrical interconnect extends through the adhesives and the base and is spaced from and electrically isolated from the base and an electrically conductive path between the pad and the terminal includes the electrical interconnect;

providing a heat spreader that includes the posts and the base;

then

mounting a semiconductor device on the first post, wherein the semiconductor device extends vertically beyond the base in the first vertical direction, extends laterally within peripheries of the posts and the first post is sandwiched between the semiconductor device and the base;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the first post, thereby thermally connecting the semiconductor device to the second post.

12. The method of claim 11, wherein providing the posts and the base includes:

providing a metal plate;

forming a first etch mask on the metal plate that selectively exposes the metal plate in the first vertical direction and defines the first post;

forming a second etch mask on the metal plate that selectively exposes the metal plate in the second vertical direction and defines the second post;

then

etching the metal plate in a first pattern defined by the first etch mask and a second pattern defined by the second etch mask, thereby forming a first recess in the metal plate that extends into but not through the metal plate and a second recess in the metal plate that extends into but not through the metal plate, wherein the first post includes an unetched portion of the metal plate that protrudes beyond the base in the first vertical direction and is laterally surrounded by the first recess, the second post includes an unetched portion of the metal plate that protrudes beyond the base in the second vertical direction and is laterally surrounded by the second recess and the base includes an unetched portion of the metal plate that is sandwiched between the posts and between the recesses; and

then

removing the etch masks.

13. The method of claim 11, wherein:

providing the first adhesive includes providing a first prepreg with a first uncured epoxy and then inserting the first post into the first opening and providing the second adhesive includes providing a second prepreg with a second uncured epoxy and then inserting the second post into the second opening;

flowing the first adhesive includes melting the first uncured epoxy and compressing the first uncured epoxy between the first conductive layer and the base and flowing the second adhesive includes melting the second uncured epoxy and compressing the second uncured epoxy between the second conductive layer and the base; and

solidifying the first adhesive includes curing the first uncured epoxy and solidifying the second adhesive includes curing the second uncured epoxy.

14. The method of claim 11, wherein flowing the first adhesive includes filling the first gap with the first adhesive and flowing the second adhesive includes filling the second gap with the second adhesive.

15. The method of claim 11, wherein:

providing the first conductive layer includes contacting the first conductive layer and the first adhesive, wherein the first aperture extends through the first conductive layer alone, and then flowing the first adhesive into the first gap; and

providing the second conductive layer includes contacting the second conductive layer and the second adhesive, wherein the second aperture extends through the second conductive layer alone, and then flowing the second adhesive into the second gap.

16. The method of claim 11, wherein:

providing the first conductive layer includes providing a first substrate that includes the first conductive layer and a first dielectric layer and then contacting the first dielectric layer and the first adhesive, wherein the first dielectric layer contacts and is sandwiched between the first conductive layer and the first adhesive and is solidified and the first aperture extends through the first conductive layer and the first dielectric layer, and then flowing the first adhesive into the first gap; and

providing the second conductive layer includes providing a second substrate that includes the second conductive layer and a second dielectric layer and then contacting the second dielectric layer and the second adhesive, wherein the second dielectric layer contacts and is sandwiched between the second conductive layer and the second adhesive and is solidified and the second aperture extends through the second conductive layer and the second dielectric layer, and then flowing the second adhesive into the second gap.

17. The method of claim 11, wherein providing the pad includes removing selected portions of the first conductive layer after solidifying the adhesives.

18. The method of claim 11, wherein providing the pad includes:

grinding the first post, the first adhesive and the first conductive layer such that the first post, the first adhesive and the first conductive layer are laterally aligned with one another at a lateral surface that faces in the first vertical direction; and

then

removing selected portions of the first conductive layer using an etch mask that defines the pad.

19. The method of claim 11, wherein providing the terminal includes removing selected portions of the second conductive layer after solidifying the adhesives.

20. The method of claim 11, wherein providing the terminal includes:

grinding the second post, the second adhesive and the second conductive layer such that the second post, the second adhesive and the second conductive layer are laterally aligned with one another at a lateral surface that faces in the second vertical direction; and

then

removing selected portions of the second conductive layer using an etch mask that defines the terminal.

21. The method of claim 11, wherein providing the electrical interconnect includes providing a plated through-hole that extends through the base and the adhesives after solidifying the adhesives.

22. The method of claim 11, wherein providing the conductive trace includes:

removing selected portions of the first conductive layer using a first etch mask that defines the pad after solidifying the adhesives; and

removing selected portions of the second conductive layer using a second etch mask that defines the terminal after solidifying the adhesives.

23. The method of claim 11, wherein providing the conductive trace includes:

providing a hole that extends through the base, the adhesives and the conductive layers after solidifying the adhesives;

then

depositing a plated metal on the posts, the adhesives and the conductive layers, wherein the plated metal forms the plated layers and forms and the electrical interconnect as a plated through-hole in the hole;

then

forming a first etch mask on the first plated layer that defines the pad;

forming a second etch mask on the second plated layer that defines the terminal;

then

etching the first conductive layer and the first plated layer in a first pattern defined by the first etch mask;

etching the second conductive layer and the second plated layer in a second pattern defined by the second etch mask; and

then

removing the etch masks.

24. The method of claim 23, wherein providing the hole includes:

providing an outer hole that extends through and is adjacent to the base, the adhesives and the conductive layers after solidifying the adhesives;

then

depositing an insulative filler into the outer hole; and

then

forming an inner hole that extends through the outer hole, extends through and is adjacent to the insulative filler, extends through and is spaced from the base, the adhesives and the conductive layers and provides the hole.

25. The method of claim 11, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the first post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the first post.

26. A method of making a semiconductor chip assembly, comprising:

providing a first post, a second post, a first adhesive, a second adhesive, a first conductive layer, a second conductive layer and a base, wherein

the first post is adjacent to and integral with the base, extends vertically from the base in a first vertical direction, extends into a first opening in the first adhesive and is aligned with a first aperture in the first conductive layer,

the second post is adjacent to and integral with the base, extends vertically from the base in a second vertical direction opposite the first vertical direction, extends into a second opening in the second adhesive and is aligned with a second aperture in the second conductive layer,

the first adhesive contacts the base, is sandwiched between the base and the first conductive layer, extends vertically beyond the base in the first vertical direction and is non-solidified,

the second adhesive contacts the base, is sandwiched between the base and the second conductive layer, extends vertically beyond the base in the second vertical direction and is non-solidified,

the first conductive layer extends vertically beyond the first adhesive in the first vertical direction,

the second conductive layer extends vertically beyond the second adhesive in the second vertical direction,

the base is sandwiched between the posts, between the adhesives and between the conductive layers and extends laterally from the posts in lateral directions orthogonal to the vertical directions, and

the first post, the first opening and the first aperture are located within a periphery of the second post;

then

flowing the first adhesive in the first vertical direction into a first gap located in the first aperture between the first post and the first conductive layer;

flowing the second adhesive in the second vertical direction into a second gap located in the second aperture between the second post and the second conductive layer;

solidifying the adhesives, thereby mechanically attaching the first conductive layer to the first post and the base using the first adhesive and mechanically attaching the second conductive layer to the second post and the base using the second adhesive;

then

depositing a first plated layer on the first post, the first adhesive and the first conductive layer, wherein the first plated layer covers the first post in the first vertical direction;

depositing a second plated layer on the second post, the second adhesive and the second conductive layer, wherein the second plated layer covers the second post in the second vertical direction;

providing a conductive trace that includes a pad, a terminal and an electrical interconnect, wherein the pad extends vertically beyond the first adhesive in the first vertical direction and includes selected portions of the first conductive layer and the first plated layer, the terminal extends vertically beyond the second adhesive in the second vertical direction and includes selected portions of the second conductive layer and the second plated layer, the electrical interconnect extends through the adhesives and the base and is spaced from and electrically isolated from the base and an electrically conductive path between the pad and the terminal includes the electrical interconnect;

providing a heat spreader that includes the posts, the base, a first cap, a second cap and selected portions of the conductive layers, wherein the first cap is adjacent to the first post, covers the first post in the first vertical direction, extends laterally from the first post and extends vertically beyond the first adhesive in the first vertical direction and includes selected portions of the first conductive layer and the first plated layer and the second cap is adjacent to the second post, covers the second post in the second vertical direction, extends laterally from the second post and extends vertically beyond the second adhesive in the second vertical direction and includes selected portions of the second conductive layer and the second plated layer;

then

mounting a semiconductor device on the first cap, wherein the semiconductor device extends vertically beyond the first cap in the first vertical direction and extends laterally within peripheries of the posts and the caps and the first post and the first cap are sandwiched between the semiconductor device and the base;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the first cap, thereby thermally connecting the semiconductor device to the second cap.

27. The method of claim 26, wherein providing the posts and the base includes:

providing a metal plate;

forming a first etch mask on the metal plate that selectively exposes the metal plate in the first vertical direction and defines the first post;

forming a second etch mask on the metal plate that selectively exposes the metal plate in the second vertical direction and defines the second post;

then

etching the metal plate in a first pattern defined by the first etch mask and a second pattern defined by the second etch mask, thereby forming a first recess in the metal plate that extends into but not through the metal plate and a second recess in the metal plate that extends into but not through the metal plate, wherein the first post includes an unetched portion of the metal plate that protrudes beyond the base in the first vertical direction and is laterally surrounded by the first recess, the second post includes an unetched portion of the metal plate that protrudes beyond the base in the second vertical direction and is laterally surrounded by the second recess and the base includes an unetched portion of the metal plate that is sandwiched between the posts and between the recesses; and

then

removing the etch masks.

28. The method of claim 26, wherein:

providing the first adhesive includes providing a first prepreg with a first uncured epoxy and then inserting the first post into the first opening and providing the second adhesive includes providing a second prepreg with a second uncured epoxy and then inserting the second post into the second opening;

flowing the first adhesive includes melting the first uncured epoxy and compressing the first uncured epoxy between the first conductive layer and the base and flowing the second adhesive includes melting the second uncured epoxy and compressing the second uncured epoxy between the second conductive layer and the base; and

solidifying the first adhesive includes curing the first uncured epoxy and solidifying the second adhesive includes curing the second uncured epoxy.

29. The method of claim 26, wherein flowing the first adhesive includes filling the first gap with the first adhesive and flowing the second adhesive includes filling the second gap with the second adhesive.

30. The method of claim 26, wherein:

providing the first conductive layer includes contacting the first conductive layer and the first adhesive, wherein the first aperture extends through the first conductive layer alone, and then flowing the first adhesive into the first gap; and

providing the second conductive layer includes contacting the second conductive layer and the second adhesive, wherein the second aperture extends through the second conductive layer alone, and then flowing the second adhesive into the second gap.

31. The method of claim 26, wherein:

providing the first conductive layer includes providing a first substrate that includes the first conductive layer and a first dielectric layer and then contacting the first dielectric layer and the first adhesive, wherein the first dielectric layer contacts and is sandwiched between the first conductive layer and the first adhesive and is solidified and the first aperture extends through the first conductive layer and the first dielectric layer, and then flowing the first adhesive into the first gap; and

providing the second conductive layer includes providing a second substrate that includes the second conductive layer and a second dielectric layer and then contacting the second dielectric layer and the second adhesive, wherein the second dielectric layer contacts and is sandwiched between the second conductive layer and the second adhesive and is solidified and the second aperture extends through the second conductive layer and the second dielectric layer, and then flowing the second adhesive into the second gap.

32. The method of claim 26, wherein providing the pad and the first cap includes removing selected portions of the first conductive layer using an etch mask that defines the pad and the first cap after solidifying the adhesives.

33. The method of claim 26, wherein providing the pad and the first cap includes:

grinding the first post, the first adhesive and the first conductive layer such that the first post, the first adhesive and the first conductive layer are laterally aligned with one another at a lateral surface that faces in the first vertical direction; and

then

removing selected portions of the first conductive layer using an etch mask that defines the pad and the first cap.

34. The method of claim 26, wherein providing the terminal and the second cap includes removing selected portions of the second conductive layer using an etch mask that defines the terminal and the second cap after solidifying the adhesives.

35. The method of claim 26, wherein providing the terminal and the second cap includes:

grinding the second post, the second adhesive and the second conductive layer such that the second post, the second adhesive and the second conductive layer are laterally aligned with one another at a lateral surface that faces in the second vertical direction; and

then

removing selected portions of the second conductive layer using an etch mask that defines the terminal and the second cap.

36. The method of claim 26, wherein providing the electrical interconnect includes providing a plated through-hole that extends through the base and the adhesives after solidifying the adhesives.

37. The method of claim 26, wherein providing the conductive trace and the heat spreader includes:

removing selected portions of the first conductive layer using a first etch mask that defines the pad and the first cap after solidifying the adhesives; and

removing selected portions of the second conductive layer using a second etch mask that defines the terminal and the second cap after solidifying the adhesives.

38. The method of claim 26, wherein providing the conductive trace and the heat spreader includes:

providing a hole that extends through the base, the adhesives and the conductive layers after solidifying the adhesives;

then

depositing a plated metal on the posts, the adhesives and the conductive layers, wherein the plated metal forms the plated layers and forms the electrical interconnect as a plated through-hole in the hole;

then

forming a first etch mask on the first plated layer that defines the pad and the first cap;

forming a second etch mask on the second plated layer that defines the terminal and the second cap;

then

etching the first conductive layer and the first plated layer in a first pattern defined by the first etch mask;

etching the second conductive layer and the second plated layer in a second pattern defined by the second etch mask; and

then

removing the etch masks.

39. The method of claim 38, wherein providing the hole includes:

providing an outer hole that extends through and is adjacent to the base, the adhesives and the conductive layers after solidifying the adhesives;

then

depositing an insulative filler into the outer hole; and

then

forming an inner hole that extends through the outer hole, extends through and is adjacent to the insulative filler, extends through and is spaced from the base, the adhesives and the conductive layers and provides the hole.

40. The method of claim 26, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the first cap, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the first cap.

53. The method of claim 26 or 41, wherein the pad is located outside the periphery of the first post and extends laterally within the periphery of the second post, the terminal is located outside the peripheries of the posts and the first cap is located within the periphery of the second post.

41. A method of making a semiconductor chip assembly, comprising:

providing a first post, a second post, a first adhesive, a second adhesive, a first conductive layer, a second conductive layer and a base, wherein

the first post is adjacent to and integral with the base, extends vertically from the base in a first vertical direction, extends into a first opening in the first adhesive and is aligned with a first aperture in the first conductive layer,

the second post is adjacent to and integral with the base, extends vertically from the base in a second vertical direction opposite the first vertical direction, extends into a second opening in the second adhesive and is aligned with a second aperture in the second conductive layer,

the first adhesive contacts the base, is sandwiched between the base and the first conductive layer, extends vertically beyond the base in the first vertical direction and is non-solidified,

the second adhesive contacts the base, is sandwiched between the base and the second conductive layer, extends vertically beyond the base in the second vertical direction and is non-solidified,

the first conductive layer extends vertically beyond the first adhesive in the first vertical direction,

the second conductive layer extends vertically beyond the second adhesive in the second vertical direction,

the base is sandwiched between the posts, between the adhesives and between the conductive layers and extends laterally from the posts in lateral directions orthogonal to the vertical directions, and

the first post, the first opening and the first aperture are located within a periphery of the second post;

then

applying heat to melt the adhesives

moving the conductive layers towards one another, thereby moving the first post in the first vertical direction in the first aperture, moving the second post in the second vertical direction in the second aperture, applying pressure to the molten first adhesive between the base and the first conductive layer and applying pressure to the molten second adhesive between the base and the second conductive layer, wherein the pressure between the base and the first conductive layer forces the molten first adhesive to flow in the first vertical direction into a first gap located in the first aperture between the first post and the first conductive layer and the pressure between the base and the second conductive layer forces the molten second adhesive to flow in the second vertical direction into a second gap located in the second aperture between the second post and the second conductive layer;

applying heat to solidify the molten adhesives, thereby mechanically attaching the first conductive layer to the first post and the base using the first adhesive and mechanically attaching the second conductive layer to the second post and the base using the second adhesive;

then

providing a conductive trace that includes a pad, a terminal and an electrical interconnect, wherein the pad includes a selected portion of the first conductive layer and extends vertically beyond the first adhesive in the first vertical direction, the terminal includes a selected portion of the second conductive layer and extends vertically beyond the second adhesive in the second vertical direction, the electrical interconnect extends through the adhesives and the base and is spaced from and electrically isolated from the base and an electrically conductive path between the pad and the terminal includes the electrical interconnect;

providing a heat spreader that includes the posts, the base, a first cap and a second cap, wherein the first cap is adjacent to the first post, covers the first post in the first vertical direction, extends laterally from the first post, extends vertically beyond the first adhesive in the first vertical direction and includes a selected portion of the first conductive layer and the second cap is adjacent to the second post, covers the second post in the second vertical direction, extends laterally from the second post, extends vertically beyond the second adhesive in the second vertical direction and includes a selected portion of the second conductive layer;

then

mounting a semiconductor device on the first cap, wherein the semiconductor device extends vertically beyond the first cap in the first vertical direction and extends laterally within peripheries of the posts and the caps and the first post and the first cap are sandwiched between the semiconductor device and the base;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the first cap, thereby thermally connecting the semiconductor device to the second cap.

42. The method of claim 41, wherein providing the posts and the base includes:

providing a metal plate;

forming a first etch mask on the metal plate that selectively exposes the metal plate in the first vertical direction and defines the first post;

forming a second etch mask on the metal plate that selectively exposes the metal plate in the second vertical direction and defines the second post;

then

etching the metal plate in a first pattern defined by the first etch mask and a second pattern defined by the second etch mask, thereby forming a first recess in the metal plate that extends into but not through the metal plate and a second recess in the metal plate that extends into but not through the metal plate, wherein the first post includes an unetched portion of the metal plate that protrudes beyond the base in the first vertical direction and is laterally surrounded by the first recess, the second post includes an unetched portion of the metal plate that protrudes beyond the base in the second vertical direction and is laterally surrounded by the second recess and the base includes an unetched portion of the metal plate that is sandwiched between the posts and between the recesses; and

then

removing the etch masks.

43. The method of claim 41, wherein:

providing the first adhesive includes providing a first prepreg with a first uncured epoxy and then inserting the first post into the first opening and providing the second adhesive includes providing a second prepreg with a second uncured epoxy and then inserting the second post into the second opening;

flowing the first adhesive includes melting the first uncured epoxy and compressing the first uncured epoxy between the first conductive layer and the base and flowing the second adhesive includes melting the second uncured epoxy and compressing the second uncured epoxy between the second conductive layer and the base; and

solidifying the first adhesive includes curing the first uncured epoxy and solidifying the second adhesive includes curing the second uncured epoxy.

44. The method of claim 41, wherein:

providing the first conductive layer includes contacting the first conductive layer and the first adhesive, wherein the first aperture extends through the first conductive layer alone, and then flowing the first adhesive into the first gap; and

providing the second conductive layer includes contacting the second conductive layer and the second adhesive, wherein the second aperture extends through the second conductive layer alone, and then flowing the second adhesive into the second gap.

45. The method of claim 41, wherein:

providing the first conductive layer includes providing a first substrate that includes the first conductive layer and a first dielectric layer and then contacting the first dielectric layer and the first adhesive, wherein the first dielectric layer contacts and is sandwiched between the first conductive layer and the first adhesive and is solidified and the first aperture extends through the first conductive layer and the first dielectric layer, and then flowing the first adhesive into the first gap; and

providing the second conductive layer includes providing a second substrate that includes the second conductive layer and a second dielectric layer and then contacting the second dielectric layer and the second adhesive, wherein the second dielectric layer contacts and is sandwiched between the second conductive layer and the second adhesive and is solidified and the second aperture extends through the second conductive layer and the second dielectric layer, and then flowing the second adhesive into the second gap.

46. The method of claim 41, wherein providing the pad and the first cap includes removing selected portions of the first conductive layer using an etch mask that defines the pad and the first cap after solidifying the adhesives.

47. The method of claim 41, wherein providing the terminal and the second cap includes removing selected portions of the second conductive layer using an etch mask that defines the terminal and the second cap after solidifying the adhesives.

48. The method of claim 41, wherein providing the conductive trace and the heat spreader includes:

providing a plated through-hole that extends through the base and the adhesives to provide the electrical interconnect after solidifying the adhesives;

then

removing selected portions of the first conductive layer using a first etch mask that defines the pad and the first cap; and

removing selected portions of the second conductive layer using a second etch mask that defines the terminal and the second cap.

49. The method of claim 41, wherein providing the conductive trace and the heat spreader includes:

providing an outer hole that extends through and is adjacent to the base, the adhesives and the conductive layers after solidifying the adhesives;

then

depositing an insulative filler into the outer hole;

then

forming an inner hole that extends through the outer hole, extends through and is adjacent to the insulative filler and extends through and is spaced from the base, the adhesives and the conductive layers;

then

depositing a plated metal on the posts, the adhesives, the conductive layers and the insulative filler, wherein the plated metal forms a first plated layer that covers the first post in the first vertical direction, a second plated layer that covers the second post in the second vertical direction and the electrical interconnect as a plated through-hole in the inner hole;

then

forming a first etch mask on the first plated layer that defines the pad and the first cap;

forming a second etch mask on the second plated layer that defines the terminal and the second cap;

then

etching the first conductive layer and the first plated layer in a first pattern defined by the first etch mask;

etching the second conductive layer and the second plated layer in a second pattern defined by the second etch mask; and

then

removing the etch masks.

50. The method of claim 41, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the first cap, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the first cap.