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Liquid crystal display device and method for manufacturing the same

  • US 8,218,099 B2
  • Filed: 08/30/2010
  • Issued: 07/10/2012
  • Est. Priority Date: 09/04/2009
  • Status: Expired due to Fees
First Claim
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1. An active matrix liquid crystal display device comprising:

  • a pixel portion formed over a substrate, the pixel portion including a first transistor; and

    a driver circuit portion formed over the substrate, the driver circuit portion including a second transistor,wherein the first transistor comprises;

    a first gate electrode layer over the substrate;

    a gate insulating layer over the first gate electrode layer;

    a first source electrode layer and a first drain electrode layer over the gate insulating layer;

    a first oxide semiconductor layer which is over the gate insulating layer and overlaps with the first source electrode layer and the first drain electrode layer;

    an oxide insulating layer which is in contact with the first oxide semiconductor layer;

    a connection electrode layer which is connected to at least one of the first source electrode layer and the first drain electrode layer; and

    a pixel electrode layer which is over the oxide insulating layer and electrically connected to the first drain electrode layer,wherein the second transistor comprises;

    a second gate electrode layer over the substrate;

    the gate insulating layer over the substrate;

    a second oxide semiconductor layer over the gate insulating layer;

    the oxide insulating layer over the second oxide semiconductor layer; and

    a second source electrode layer and a second drain electrode layer over the oxide insulating layer,wherein each of the first gate electrode layer, the gate insulating layer, the first oxide semiconductor layer, the first source electrode layer, the first drain electrode layer, the oxide insulating layer, and the pixel electrode layer has a light-transmitting property, andwherein a channel formation region of the second oxide semiconductor layer and a peripheral portion of the second oxide semiconductor layer are in contact with the oxide insulating layer.

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