Hybrid memory device
First Claim
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1. A system, comprising:
- a first non-volatile memory device;
a second non-volatile memory device; and
a memory controller coupled to the first and second non-volatile memory devices, wherein the memory controller is to split data between the first and second non-volatile memory devices;
wherein the first non-volatile memory device is to store user specified high priority writes;
wherein the second non-volatile memory device is to store user defined low priority writes and at least one of metadata updates after lazy writes, or cache background writes for read miss insertions, or clean cache data, or non-volatile memory writes due to background relocations.
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Abstract
A method is provided. The method includes receiving data and classifying received data in one of several tiers of data. The method also includes storing each tier of data on a different non-volatile memory device.
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Citations
20 Claims
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1. A system, comprising:
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a first non-volatile memory device; a second non-volatile memory device; and a memory controller coupled to the first and second non-volatile memory devices, wherein the memory controller is to split data between the first and second non-volatile memory devices; wherein the first non-volatile memory device is to store user specified high priority writes; wherein the second non-volatile memory device is to store user defined low priority writes and at least one of metadata updates after lazy writes, or cache background writes for read miss insertions, or clean cache data, or non-volatile memory writes due to background relocations. - View Dependent Claims (2, 3, 4, 5)
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6. A semiconductor device;
- comprising;
a processor; a single-level cell (SLC) NAND flash memory device coupled to the processor; and a multi-level cell (MLC) NAND flash memory device coupled to the processor, wherein at least one of cache workload and a solid state drive workload is split between the single-level cell and multi-level cell NAND flash memory devices; wherein the processor is to receive instructions from a user to identify high priority writes and low priority writes; wherein the single-level cell (SLC) NAND flash memory device is to store the high priority writes; and wherein the multi-level cell (MLC) NAND flash memory device is to store the low priority writes and at least one of metadata updates after lazy writes, or cache background writes for read miss insertions, or clean cache data, or non-volatile memory writes due to background relocations. - View Dependent Claims (7, 8, 9, 10)
- comprising;
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11. A method, comprising:
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splitting a workload data into tier 1 data and tier 2 data; and transferring the tier 1 and tier 2 data to first and second non-volatile memory devices respectively, wherein an access time of the first non-volatile memory device is relatively lower than an access time of the second non-volatile memory device; wherein the tier 1 data comprises user specified writes, and the tier 2 data comprises user defined low priority writes and at least one of metadata updates after lazy writes, or cache background writes for read miss insertions, or clean cache data, or non-volatile memory writes due to background relocations. - View Dependent Claims (12, 13, 14, 15, 16)
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17. A method, comprising:
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receiving data; classifying received data in one of several tiers of data, the several tiers of data including tier 1 data and tier 2 data; storing each tier of data on a different non-volatile memory device, wherein storing the tier 1 data comprises storing user specified writes on a first non-volatile memory device; and wherein storing the tier 2 data comprises storing user defined low priority writes on a second non-volatile memory device and storing the tier 2 data on the second non-volatile memory device also includes at least one of metadata updates after lazy writes, or cache background writes for read miss insertions, or clean cache data, or non-volatile memory writes due to background relocations. - View Dependent Claims (18, 19, 20)
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Specification