Method of forming semiconductor patterns
First Claim
Patent Images
1. A method of forming semiconductor patterns, the method comprising:
- forming a photo resist template having a pattern of lines on a bottom layer, the pattern having a line width and a line spacing, the ratio of the line width to the line spacing being 1;
A wherein 1≦
A<
3;
depositing a spacer oxide conformal over the photo resist template by a Plasma Enhanced Atomic Layer deposition process, using sequential and alternating pulses of a silicon precursor and an oxygen plasma, such that trimming of the photo resist template occurs and the ratio of the line width to the line spacing becomes 1;
3 and the thickness of the deposited spacer oxide is about equal to the trimmed line width, wherein the silicon precursor is SiH2[N(C2H5)2]2;
etching back the deposited spacer oxide such that spacer oxide films on upper and bottom surfaces of the pattern are removed, with spacer oxide films on side wall surfaces of the photo resist template remaining;
removing the photo resist template remaining between the spacer oxide films by selective etching; and
patterning the bottom layer by using the remaining spacer oxide films formed as mask.
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Abstract
Semiconductor patterns are formed by performing trimming simultaneously with the process of depositing the spacer oxide. Alternatively, a first part of the trimming is performed in-situ, immediately before the spacer oxide deposition process in the same chamber in which the spacer oxide deposition is performed whereas a second part of the trimming is performed simultaneously with the process of depositing the spacer oxide. Thus, semiconductor patterns are formed reducing PR footing during PR trimming with direct plasma exposure.
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Citations
14 Claims
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1. A method of forming semiconductor patterns, the method comprising:
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forming a photo resist template having a pattern of lines on a bottom layer, the pattern having a line width and a line spacing, the ratio of the line width to the line spacing being 1;
A wherein 1≦
A<
3;depositing a spacer oxide conformal over the photo resist template by a Plasma Enhanced Atomic Layer deposition process, using sequential and alternating pulses of a silicon precursor and an oxygen plasma, such that trimming of the photo resist template occurs and the ratio of the line width to the line spacing becomes 1;
3 and the thickness of the deposited spacer oxide is about equal to the trimmed line width, wherein the silicon precursor is SiH2[N(C2H5)2]2;etching back the deposited spacer oxide such that spacer oxide films on upper and bottom surfaces of the pattern are removed, with spacer oxide films on side wall surfaces of the photo resist template remaining; removing the photo resist template remaining between the spacer oxide films by selective etching; and patterning the bottom layer by using the remaining spacer oxide films formed as mask. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of forming semiconductor patterns, the method comprising:
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forming a photo resist template having a pattern of lines on a bottom layer, the pattern having a line width and a line spacing, the ratio of the line width to the line spacing being 1;
A wherein 1≦
A<
3;a photo resist footing reduction step comprising a direct plasma exposure step; after performing the photo resist footing reduction step, trimming the photo resist pattern of lines such that the ratio of the line width to the line spacing becomes 1;
B, wherein A<
B<
3, by exposing the photo resist pattern of lines to pulses of an oxygen plasma;after trimming the photo resist pattern of lines, depositing a spacer oxide conformal over the photo resist template by a Plasma Enhanced Atomic Layer deposition process, using sequential and alternating pulses of a silicon precursor and the oxygen plasma, such that trimming of the photo resist template occurs and the ratio of the line width to the line spacing becomes 1;
3 and the thickness of the deposited spacer oxide is about equal to the trimmed line width;etching back the deposited spacer oxide such that spacer oxide films on upper and bottom surfaces of the pattern are removed, with spacer oxide films on side wall surfaces of the photo resist template remaining; removing the photo resist template remaining between the spacer oxide films by selective etching; and patterning the bottom layer by using the remaining spacer oxide films formed as mask, wherein trimming the photo resist, depositing the spacer oxide, and the photo resist footing reduction step are performed in a common reaction chamber. - View Dependent Claims (12, 13, 14)
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Specification