Systems, methods and computer program products for encoding data to be written to a nonvolatile memory based on wear-leveling information

• US 8,281,064 B2
• Filed: 03/24/2009
• Issued: 10/02/2012
• Est. Priority Date: 04/15/2008
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Oh, Hwa-Seok, Choi, Jin-Hyeok
• Primary Examiner(s): Shah, Sanjiv
• Assistant Examiner(s): Tsui, Daniel
• Application Number:
  US12/410,150
• Publication Number:
  US 20090259803A1
• Time in Patent Office: 1,288 Days
• Field of Search: 711/103
• US Class Current: 711/103
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 2211/5647 Multilevel memory with bit inversion arrangement
• CPC Class Codes: G11C 29/00 Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation

Abstract

A nonvolatile memory system is operated by providing data to be written to a nonvolatile memory, logically combining the data to be written to the nonvolatile memory with a random pattern to generate encoded data; and programming the encoded data in the nonvolatile memory.

Claims

1. A memory system comprising:

a nonvolatile memory; and

a memory controller that is configured to logically combine data to be written to the nonvolatile memory with a random pattern to generate encoded data and to program the encoded data in the nonvolatile memory, the memory controller comprising;

a select code generator that is configured to generate a select code based on a reference value, the reference value being associated with a block in the nonvolatile memory into which the encoded data is programmed;

a buffer memory;

a plurality of random pattern generators; and

a selector that is configured to select an output of one of the random pattern generators as the random pattern responsive to the select code;

wherein the memory controller is further configured to change the reference value when the block in the nonvolatile memory that is associated therewith is accessed; and

wherein the memory controller is further configured to manage the reference value in the buffer memory, periodically store the reference value managed in the buffer memory to the nonvolatile memory, read the reference value from the nonvolatile memory after a sudden power off, and to compensate the read reference value after the sudden power off.

2. The memory system of claim 1, wherein the reference value is an erase count value.

3. The memory system of claim 1, wherein the memory controller is further configured to read the encoded data from the nonvolatile memory and to decode the encoded data using the random pattern.

4. The memory system of claim 3, wherein the memory controller is further configured to decode the encoded data by logically combining the encoded data with the random pattern.

5. The memory system of claim 4, wherein the memory controller is further configured to logically combine the data to be written to the nonvolatile memory with a random pattern by performing an exclusive-OR operation on the data to be written to the nonvolatile memory and the random pattern and to logically combine the encoded data with the random pattern by performing an exclusive-OR operation on the encoded data and the random pattern.

6. The memory system of claim 1, wherein the data to be written to the nonvolatile memory comprises error correction data.

7. The memory system of claim 1, wherein the reference value is a read count value.

8. A method of operating a non-volatile memory system, comprising:

providing data to be written to a non-volatile memory;

generating a plurality of random patterns;

generating a select code based on a reference value;

combining the data to be written to the non-volatile memory with a random pattern, which is selected from the plurality of random patterns based on the select code and programming the combined data in the non-volatile memory, the reference value being associated with a block in the non-volatile memory into which the combined data is programmed; and

changing the reference value when the block in the non-volatile memory that is associated therewith is accessed;

wherein the reference value is periodically stored to the nonvolatile memory, read from the nonvolatile memory after a sudden power off and compensated according to the reading after the sudden power off.

9. The method of claim 8, wherein the reference value is an erase count value.

10. The method of claim 8, wherein the reference value and the changed data are stored in separate regions in the non-volatile memory.

11. The method of claim 8, wherein the reference value and the changed data are stored in a same region in the non-volatile memory.

12. The method of claim 8 wherein combining the data to be written with the random pattern and programming the combined data comprises:

combining the data to be written when a data change condition is satisfied.

13. The method of claim 12, wherein the data change condition is an erase count value associated with a block in the nonvolatile memory into which the combined data is programmed exceeds an erase count threshold.

14. The method of claim 8, wherein each cell of the non-volatile memory is configured to store N-bit data, where N is greater than one, wherein changing the data to be written comprises:

changing a most significant bit (MSB) portion of the data; and

changing a least significant bit (LSB) portion of the data.

15. The method of claim 8, wherein combining the data to be written with the random pattern and programming the combined data comprises:

combining the data to be written when a read or program error has occurred in a block in the nonvolatile memory into which the combined data is to be programmed.

16. The method of claim 8, wherein the reference value is a read count value.

17. A non-volatile memory, comprising:

a data changing unit that is configured to receive data to be written to the non-volatile memory, to generate a plurality of random patterns, to generate a select code based on a reference value, to select a random pattern from the plurality of random patterns based on the select code, to combine the data to be written to the non-volatile memory with the selected random pattern, and to program the combined data in the non-volatile memory;

wherein the reference value is associated with a block in the non-volatile memory into which the combined data is programmed and wherein the data changing unit is further configured to change the reference value when the block in the non-volatile memory that is associated therewith is accessed;

wherein the reference value is periodically stored to nonvolatile memory cells, read from the nonvolatile memory cells after a sudden power off, and compensated according to the reading after the sudden power off.

18. The nonvolatile memory of claim 17, wherein the reference value is a read count value.