Protocol translation in a serial buffer

• US 8,312,190 B2
• Filed: 03/06/2008
• Issued: 11/13/2012
• Est. Priority Date: 03/06/2008
• Status: Active Grant

• Current Assignee: Integrated Device Technology Incorporated (Renesas Electronics Corporation)
• Original Assignee: Integrated Device Technology Incorporated (Renesas Electronics Corporation)
• Inventors: Wang, Chi-Lie, Mo, Jason Z.
• Primary Examiner(s): Lee, Chun-Kuan
• Assistant Examiner(s): YU, HENRY W
• Application Number:
  US12/043,929
• Publication Number:
  US 20090228621A1
• Time in Patent Office: 1,713 Days
• Field of Search: None
• US Class Current: 710/62
• CPC Class Codes: G06F 13/387 for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system

Abstract

A serial buffer includes a first port configured to operate in accordance with a first serial protocol and a second port configured to operate in accordance with a second serial protocol. A first translation circuit of the serial buffer allows packets received on the first port to be translated to the second serial protocol, and then transferred to the second port. A second translation circuit of the serial buffer allows packets received on the second port to be translated to the first serial protocol, and then transferred to the first port. Translations may be performed in response to information included in the headers of the received packets, including source ID values, destination ID values and/or case number values.

Claims

1. A serial buffer comprising:

a first port configured to operate in accordance with a first serial protocol;

a second port configured to operate in accordance with a second serial protocol, different than the first serial protocol;

one or more queues that store packets received by the first port;

a first translation circuit that receives the packets stored by the one or more queues, and translates these packets from a first format consistent with the first serial protocol to a second format consistent with the second serial protocol, the first translation circuit including;

a plurality of case scenario registers, each storing a corresponding set of predetermined header information consistent with the second serial protocol; and

selection logic that selectively accesses one of the case scenario registers in response to each of the packets received from the one or more queues, wherein the selection logic has a first configuration in which the case scenario registers are accessed in response to case number values included in the packets received from the one or more queues, and a second configuration in which the case scenario registers are accessed in response to one or more case number values assigned to the one or more queues.

2. The serial buffer of claim 1, further comprising a second translation circuit configured to translate packets received by the second port from a third format consistent with the second serial protocol to a fourth format consistent with the first serial protocol.

3. The serial buffer of claim 2, wherein the first format is identical to the fourth format, and the second format is identical to the third format.

4. The serial buffer of claim 1, wherein the first serial protocol comprises a Lite-weight protocol, and the second serial protocol comprises a serial rapid IO (sRIO) protocol.

5. The serial buffer of claim 1, further comprising a second translation circuit that includes:

a plurality of case selection registers, each configured to store a corresponding source identification value and a corresponding case number value; and

means for retrieving the case number value from a case selection register if a source identification value present in a packet received by the first port matches the source identification value stored in the case selection register.

6. The serial buffer of claim 5, wherein the second translation circuit is configured to construct a packet that includes the retrieved case number value and has the second format.

7. The serial buffer of claim 1, wherein the first translation circuit further comprises means for segmenting packets received from the first port if the packets received from the first port are not aligned in a manner consistent with the second serial protocol.

10. The serial buffer of claim 1, wherein predetermined header information is retrieved each time the case scenario registers are accessed, and wherein the first translation circuit includes means for providing packets having the second format and including the retrieved predetermined header information.

11. The serial buffer of claim 1, wherein the selection logic comprises a multiplexer associated with each of the one or more queues, wherein each multiplexer is coupled to receive case number values included in the packets received from the associated one of the one or more queues, and the case number value assigned to the associated one of the one or more queues.

8. A method of operating a serial buffer comprising:

receiving packets having a first format defined by a first serial protocol on a first port of the serial buffer, wherein each of the packets having the first format includes a case number value;

storing the packets received by the first port in one or more queues;

assigning a case number value to each of the one or more queues;

specifying, for each of the one or more queues, whether each of the one or more queues is accessible in a queue-based manner or a packet-based manner;

retrieving the packets stored in the one or more queues;

for each packet retrieved from a queue accessible in the queue-based manner, generating a translated packet having a second format consistent with a second serial protocol in response to the case number value assigned to the queue from which the packet is retrieved; and

for each packet retrieved from a queue accessible in the packet-based manner, generating a translated packet having the second format in response to the case number value included in the retrieved packet.

9. The serial buffer of claim 8, wherein the first serial protocol comprises a Lite-weight protocol, and the second serial protocol comprises a serial rapid IO (sRIO) protocol.

12. The method of claim 8, further comprising transmitting each translated packet to a second port of the serial buffer.

13. The method of claim 12, further comprising storing a plurality of sets of predetermined header information consistent with the second format in a corresponding plurality of case scenario registers, wherein each translated packet is generated by retrieving a set of predetermined header information from a corresponding one of the case scenario registers in response to a case number value.

14. The method of claim 13, wherein the sets of predetermined header information correspond with different packet types of the second serial protocol.

15. The method of claim 12, further comprising:

receiving one or more packets having the second format on the second port of the serial buffer, each including a source identification value;

defining a plurality of case selection registers, each storing a source identification value and a corresponding case number value;

comparing the source identification value of each of the one or more packets received on the second port with the source identification values stored in the case selection registers, and upon detecting a match, retrieving the case number value from the case selection register that stores the matching source identification value; and

generating a translated packet having a header that includes the case number value retrieved from the case selection register, wherein the translated packet has the first format.