Stacked-chip device
First Claim
1. A stacked-chip device comprising:
- a first inductive chip having a first function;
a second inductive chip having a second function different from the first function, which is stacked on the first inductive chip; and
a third inductive chip having the second function, which is stacked on the second inductive chip,wherein each of the first, second and third inductive chips has an array of transmitting inductors which transmit data and receiving inductors which receive data,wherein an order of arranging the transmitting inductors and the receiving inductors is the same in the first, second and third inductive chips,wherein the transmitting inductors and the receiving inductors in the first inductive chip are arranged symmetrically with respect to a first line, the transmitting inductors and the receiving inductors in the second inductive chip are arranged symmetrically with respect to a second line which passes through a center of the second inductive chip, and the transmitting inductors and the receiving inductors in the third inductive chip are arranged symmetrically with respect to a third line which passes through a center of the third inductive chip,wherein the first, second and third lines are overlapped,wherein each of the second and third inductive chips is disposed in upside-down or back to front to the first inductive chip.
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Accused Products
Abstract
A stacked-chip device includes a first inductive chip having a first function, a second inductive chip having a second function different from the first function, which is stacked on the first inductive chip, and a third inductive chip having the second function, which is stacked on the second inductive chip. Each of the first, second and third inductive chips has transmitting inductors which transmit data and receiving inductors which receive data. The transmitting inductors and the receiving inductors are disposed in line symmetry to an axis of symmetry. The axes of symmetry of the first, second and third inductive chips are overlapped. Each of the second and third inductive chips is disposed in upside-down or back to front to the first inductive chip.
27 Citations
10 Claims
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1. A stacked-chip device comprising:
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a first inductive chip having a first function; a second inductive chip having a second function different from the first function, which is stacked on the first inductive chip; and a third inductive chip having the second function, which is stacked on the second inductive chip, wherein each of the first, second and third inductive chips has an array of transmitting inductors which transmit data and receiving inductors which receive data, wherein an order of arranging the transmitting inductors and the receiving inductors is the same in the first, second and third inductive chips, wherein the transmitting inductors and the receiving inductors in the first inductive chip are arranged symmetrically with respect to a first line, the transmitting inductors and the receiving inductors in the second inductive chip are arranged symmetrically with respect to a second line which passes through a center of the second inductive chip, and the transmitting inductors and the receiving inductors in the third inductive chip are arranged symmetrically with respect to a third line which passes through a center of the third inductive chip, wherein the first, second and third lines are overlapped, wherein each of the second and third inductive chips is disposed in upside-down or back to front to the first inductive chip. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A stacked-chip device comprising:
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a first inductive chip having a first function; a second inductive chip having a second function different from the first function, which is stacked on the first inductive chip; and a third inductive chip having the second function, which is stacked on the second inductive chip, wherein the first inductive chip has first and second transmitting inductors which transmit data, the second inductive chip has a first array of inductors including a first receiving inductor which receives data, and the third inductive chip has a second array of inductors including a second receiving inductor which receives data, wherein the first and second transmitting inductors in the first inductive chip are arranged symmetrically with respect to a point, and an order of arranging the inductors in the first array is the, same as an order of arranging the inductors in the second array, wherein the second chip is disposed in upside-down or back to front to the first and third inductive chips, wherein the first receiving inductor receives a first chip enable signal, from the first transmitting inductor, and the second receiving inductor receives a second chip enable signal from the second transmitting inductor.
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Specification