Method of making a semiconductor chip assembly with a bump/base/ledge heat spreader, dual adhesives and a cavity in the bump

• US 8,354,283 B2
• Filed: 12/26/2011
• Issued: 01/15/2013
• Est. Priority Date: 03/25/2008
• Status: Expired due to Fees

• Current Assignee: Bridge Semiconductor Corporation
• Original Assignee: Bridge Semiconductor Corporation
• Inventors: Lin, Charles W. C., Wang, Chia-Chung
• Primary Examiner(s): Cao, Phat X
• Application Number:
  US13/337,164
• Publication Number:
  US 20120094442A1
• Time in Patent Office: 386 Days
• Field of Search: 438/25, 438/26, 438/118, 438/122, 257/99, 257/707
• US Class Current: 438/25
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 2224/2929 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/29339 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/8385 using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
• CPC Class Codes: H01L 2224/85205 Ultrasonic bonding
• CPC Class Codes: H01L 2224/8592 Applying permanent coating, e.g. protective coating
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01087 : Francium [Fr]
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 33/483 : Containers
• CPC Class Codes: H01L 33/642 : characterized by the shape
• CPC Class Codes: H05K 1/021 : Components thermally connected to metal substrates or heat-sinks by insert mounting
• CPC Class Codes: H05K 2201/0352 : Differences between the conductors of different layers of a multilayer
• CPC Class Codes: H05K 2201/0355 : Metal foils
• CPC Class Codes: H05K 2201/10106 : Light emitting diode [LED]
• CPC Class Codes: H05K 2203/049 : Wire bonding
• CPC Class Codes: H05K 2203/063 : of preperforated insulating layer
• CPC Class Codes: H05K 3/4084 : by deforming at least one of the conductive layers

Abstract

A method of making a semiconductor chip assembly includes providing a bump and a ledge, mounting a first adhesive on the ledge including inserting the bump into an opening in the first adhesive, mounting a conductive layer on the first adhesive including aligning the bump with an aperture in the conductive layer, then flowing the first adhesive between the bump and the conductive layer, solidifying the first adhesive, then providing a heat spreader that includes the bump, a base and the ledge, then mounting a second adhesive on the ledge, mounting a conductive trace that includes a pad and a terminal on the second adhesive, then mounting a semiconductor device on the bump in a cavity in the bump, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Claims

1. A method of making a semiconductor chip assembly, comprising:

providing a bump, a ledge, a first adhesive and a first conductive layer, wherein

the bump defines a cavity that faces in a first vertical direction, covers the cavity in a second vertical direction opposite the first vertical direction, is adjacent to and integral with the ledge, extends vertically from the ledge in the second vertical direction, extends into a first opening in the first adhesive and is aligned with a first aperture in the first conductive layer,

the ledge extends laterally from the bump in lateral directions orthogonal to the vertical directions,

the first adhesive is mounted on the ledge, is sandwiched between the ledge and the first conductive layer and is non-solidified, and

the first conductive layer is mounted on the first adhesive;

then

flowing the first adhesive in the second vertical direction into a gap located in the first aperture between the bump and the first conductive layer;

solidifying the first adhesive;

then

providing a heat spreader that includes the bump, a base and the ledge, wherein the bump is adjacent to the base and extends vertically from the base in the first vertical direction and the base covers the bump in the second vertical direction, extends laterally from the bump and includes a portion of the first conductive layer that is adjacent to the first aperture and spaced from the bump;

then

mounting a conductive trace and a second adhesive on the ledge, wherein the conductive trace includes a pad and a terminal and is located outside the cavity and beyond the ledge in the first vertical direction, the second adhesive is sandwiched between the conductive trace and the ledge and includes a second opening, the bump is aligned with and spaced from the second opening and the ledge is sandwiched between the adhesives and covers the conductive trace in the second vertical direction;

then

mounting a semiconductor device on the bump, wherein the semiconductor device extends into the cavity;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the bump, thereby thermally connecting the semiconductor device to the base.

2. The method of claim 1, wherein providing the bump includes mechanically stamping a metal plate.

3. The method of claim 1, wherein:

providing the first adhesive includes providing a prepreg with uncured epoxy;

flowing the first adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the ledge and the first conductive layer; and

solidifying the first adhesive includes curing the uncured epoxy.

4. The method of claim 1, wherein flowing the first adhesive includes filling the gap with the first adhesive and forcing the first adhesive beyond the bump in the second vertical direction such that the first adhesive contacts a surface of the bump that faces in the second vertical direction.

5. The method of claim 1, wherein mounting the first conductive layer includes mounting the first conductive layer alone on the first adhesive such that the first conductive layer contacts the first adhesive and the first aperture extends through the first conductive layer alone.

6. The method of claim 1, wherein mounting the first conductive layer includes mounting a first substrate that includes the first conductive layer and a first dielectric layer on the first adhesive such that the first dielectric layer contacts and is sandwiched between the first conductive layer and the first adhesive, the first conductive layer is spaced from the first adhesive and the first aperture extends through the first conductive layer and the first dielectric layer.

7. The method of claim 1, wherein providing the base includes:

grinding the bump, the first adhesive and the first conductive layer such that the bump, the first adhesive and the first conductive layer are laterally aligned with one another at a lateral surface that faces in the second vertical direction; and

then depositing a plated layer on the bump, the first adhesive and the first conductive layer,

wherein the plated layer covers the bump in the second vertical direction and extends laterally from the bump to the first conductive layer.

8. The method of claim 1, wherein mounting the second adhesive includes providing a pressure-sensitive adhesive tape on the ledge.

9. The method of claim 1, wherein mounting the conductive trace includes mounting a second substrate that includes the conductive trace and a second dielectric layer on the second adhesive such that the second dielectric layer is sandwiched between the conductive trace and the second adhesive and is solidified, a second aperture extends through the second substrate and the bump is aligned with and spaced from the second aperture.

10. The method of claim 1, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the bump, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the bump.

11. A method of making a semiconductor chip assembly, comprising:

providing a bump and a ledge, wherein the bump defines a cavity that faces in a first vertical direction, is adjacent to and integral with the ledge and extends vertically from the ledge in a second vertical direction opposite the first vertical direction, the ledge extends laterally from the bump in lateral directions orthogonal to the vertical directions and the cavity is covered by the bump in the second vertical direction;

providing a first adhesive, wherein a first opening extends through the first adhesive;

providing a first conductive layer, wherein a first aperture extends through the first conductive layer;

mounting the first adhesive on the ledge, including inserting the bump into the first opening;

mounting the first conductive layer on the first adhesive, including aligning the bump with the first aperture, wherein the first adhesive is sandwiched between the ledge and the first conductive layer and is non-solidified;

then

applying heat to melt the first adhesive;

moving the ledge and the first conductive layer towards one another, thereby moving the bump in the second vertical direction in the first aperture and applying pressure to the molten adhesive between the ledge and the first conductive layer, wherein the pressure forces the molten adhesive to flow in the second vertical direction into a gap located in the first aperture between the bump and the first conductive layer;

applying heat to solidify the molten adhesive, thereby mechanically attaching the bump and the ledge to the first conductive layer;

then

depositing a plated layer on the bump, the first adhesive and the first conductive layer, wherein the plated layer covers the bump in the second vertical direction and extends laterally from the bump to the first conductive layer;

providing a base that includes a portion of the first conductive layer that is adjacent to the first aperture and spaced from the bump and a portion of the plated layer that is adjacent to the bump, the first conductive layer and the first adhesive;

providing a heat spreader that includes the bump, the base and the ledge, wherein the bump is adjacent to the base and extends vertically from the base in the first vertical direction and the base covers the bump in the second vertical direction and extends laterally from the bump;

then

mounting a conductive trace and a second adhesive on the ledge, wherein the conductive trace includes a pad and a terminal and is located outside the cavity and beyond the ledge in the first vertical direction, the second adhesive is sandwiched between the conductive trace and the ledge, a second opening extends through the second adhesive, the bump is aligned with and spaced from the second opening and the ledge is sandwiched between the adhesives and covers the conductive trace in the second vertical direction;

mechanically attaching the conductive trace to the ledge using the second adhesive;

then

mounting a semiconductor device on the bump, wherein the semiconductor device extends into the cavity;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the bump, thereby thermally connecting the semiconductor device to the base.

12. The method of claim 11, wherein providing the bump includes mechanically stamping a metal plate, thereby forming the bump in the metal plate and the cavity in the bump, wherein the bump is a stamped portion of the metal plate and the ledge is an unstamped portion of the metal plate.

13. The method of claim 11, wherein:

providing the first adhesive includes providing a prepreg with uncured epoxy;

flowing the first adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the ledge and the first conductive layer; and

solidifying the first adhesive includes curing the uncured epoxy.

14. The method of claim 11, wherein flowing the first adhesive includes filling the gap with the first adhesive and forcing the first adhesive beyond the bump in the second vertical direction such that the first adhesive contacts a surface of the bump that faces in the second vertical direction.

15. The method of claim 11, wherein mounting the first conductive layer includes mounting the first conductive layer alone on the first adhesive such that the first conductive layer contacts the first adhesive and the first aperture extends through the first conductive layer alone.

16. The method of claim 11, wherein mounting the first conductive layer includes mounting a first substrate that includes the first conductive layer and a first dielectric layer on the first adhesive such that the first dielectric layer contacts and is sandwiched between the first conductive layer and the first adhesive, the first conductive layer is spaced from the first adhesive and the first aperture extends through the first conductive layer and the first dielectric layer.

17. The method of claim 11, wherein providing the base includes:

grinding the bump, the first adhesive and the first conductive layer such that the bump, the first adhesive and the first conductive layer are laterally aligned with one another at a lateral surface that faces in the second vertical direction; and

then

depositing the plated layer on the bump, the first adhesive and the first conductive layer.

18. The method of claim 11, wherein mounting the second adhesive includes providing a pressure-sensitive adhesive tape on a solder mask on the ledge, the solder mask contacts and is sandwiched between and separates the ledge and the adhesive tape and includes a window that defines a reflective surface finish for the bump, and mechanically attaching the conductive trace includes compressing the adhesive tape between the conductive trace and the solder mask.

19. The method of claim 11, wherein mounting the conductive trace includes mounting a second substrate that includes the conductive trace and a second dielectric layer on the second adhesive such that the second dielectric layer is sandwiched between the conductive trace and the second adhesive and is solidified, a second aperture extends through the second substrate and the bump is aligned with and spaced from the second aperture.

20. The method of claim 11, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the bump, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the bump.

21. A method of making a semiconductor chip assembly, comprising:

providing a bump and a ledge, wherein the bump defines a cavity that faces in a first vertical direction, is adjacent to and integral with the ledge and extends vertically from the ledge in a second vertical direction opposite the first vertical direction, the ledge extends laterally from the bump in lateral directions orthogonal to the vertical directions and the cavity is covered by the bump in the second vertical direction;

providing a first adhesive, wherein a first opening extends through the first adhesive;

providing a first substrate that includes a first conductive layer and a first dielectric layer, wherein a first aperture extends through the first substrate;

mounting the first adhesive on the ledge, including inserting the bump through the first opening;

mounting the first substrate on the first adhesive, including inserting the bump into the first aperture, wherein the first adhesive is sandwiched between the ledge and the first dielectric layer and is non-solidified, the first dielectric layer is sandwiched between the first conductive layer and the first adhesive and is solidified and the first conductive layer is spaced from the first adhesive;

then

applying heat to melt the first adhesive;

moving the ledge and the first conductive layer towards one another, thereby moving the bump in the second vertical direction in the first aperture and applying pressure to the molten adhesive between the ledge and the first substrate, wherein the pressure forces the molten adhesive to flow in the second vertical direction into a gap located in the first aperture between the bump and the first substrate;

applying heat to solidify the molten adhesive, thereby mechanically attaching the bump and the ledge to the first substrate;

then

depositing a plated layer on the bump, the first adhesive and the first conductive layer, wherein the plated layer covers the bump in the second vertical direction and extends laterally from the bump to the first conductive layer;

providing a base that includes a portion of the first conductive layer that is adjacent to the first dielectric layer and the first aperture and spaced from the bump and a portion of the plated layer that is adjacent to the bump, the first conductive layer and the first adhesive;

providing a heat spreader that includes the bump, the base and the ledge, wherein the bump is adjacent to the base and extends vertically from the base in the first vertical direction and the base covers the bump in the second vertical direction and extends laterally from the bump;

then

mounting a second substrate and a second adhesive on the ledge, wherein the second substrate includes a conductive trace and a second dielectric layer, the conductive trace includes a pad and a terminal and is located outside the cavity and beyond the ledge in the first vertical direction, the second dielectric layer is sandwiched between the conductive trace and the second adhesive and is solidified, the second adhesive is sandwiched between the second dielectric layer and the ledge, a second aperture extends through the second substrate, a second opening extends through the second adhesive, the bump is aligned with and spaced from the second opening and the second aperture and the ledge is sandwiched between the adhesives and covers the conductive trace in the second vertical direction;

mechanically attaching the second substrate to the ledge using the second adhesive;

then

mounting a semiconductor device on the bump, wherein the semiconductor device extends into the cavity and the bump provides a recessed die paddle and a reflector for the semiconductor device;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the bump, thereby thermally connecting the semiconductor device to the base.

22. The method of claim 21, wherein providing the bump includes mechanically stamping a metal plate, thereby forming the bump in the metal plate and the cavity in the bump, wherein the bump is a stamped portion of the metal plate and the ledge is an unstamped portion of the metal plate.

23. The method of claim 21, wherein:

providing the first adhesive includes providing a prepreg with uncured epoxy;

flowing the first adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the ledge and the first substrate;

solidifying the first adhesive includes curing the uncured epoxy;

mounting the second adhesive includes providing a pressure-sensitive adhesive tape on the ledge; and

mechanically attaching the second substrate includes compressing the adhesive tape between the ledge and the second substrate.

24. The method of claim 21, wherein providing the base includes:

grinding the bump, the first adhesive and the first conductive layer such that the bump, the first adhesive and the first conductive layer are laterally aligned with one another at a lateral surface that faces in the second vertical direction; and

then

depositing the plated layer on the bump, the first adhesive and the first conductive layer.

25. The method of claim 21, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the bump, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the bump.

26. A method of making a semiconductor chip assembly, comprising:

providing a bump and a ledge, wherein the bump defines a cavity that faces in a first vertical direction, is adjacent to and integral with the ledge and extends vertically from the ledge in a second vertical direction opposite the first vertical direction, the ledge extends laterally from the bump in lateral directions orthogonal to the vertical directions and the cavity is covered by the bump in the second vertical direction;

providing a first adhesive, wherein a first opening extends through the first adhesive;

providing a first substrate that includes a first conductive layer and a first dielectric layer, wherein a first aperture extends through the first substrate;

mounting the first adhesive on the ledge, including inserting the bump through the first opening;

mounting the first substrate on the first adhesive, including inserting the bump into the first aperture, wherein the first adhesive is sandwiched between the ledge and the first dielectric layer and is non-solidified, the first dielectric layer is sandwiched between the first conductive layer and the first adhesive and is solidified and the first conductive layer is spaced from the first adhesive;

then

applying heat to melt the first adhesive;

moving the ledge and the first conductive layer towards one another, thereby moving the bump in the second vertical direction in the first aperture and applying pressure to the molten adhesive between the ledge and the first substrate, wherein the pressure forces the molten adhesive to flow in the second vertical direction into a gap located in the first aperture between the bump and the first substrate;

applying heat to solidify the molten adhesive, thereby mechanically attaching the bump and the ledge to the first substrate;

then

depositing a plated layer on the bump, the first adhesive and the first conductive layer, wherein the plated layer covers the bump in the second vertical direction and extends laterally from the bump to the first conductive layer;

providing a base that includes a portion of the first conductive layer that is adjacent to the first dielectric layer and the first aperture and spaced from the bump and a portion of the plated layer that is adjacent to the bump, the first conductive layer and the first adhesive;

providing a heat spreader that includes the bump, the base and the ledge, wherein the bump is adjacent to the base and extends vertically from the base in the first vertical direction and the base covers the bump in the second vertical direction and extends laterally from the bump;

then

providing a solder mask on the ledge, wherein a window extends through the solder mask and the bump is aligned with and spaced from the window;

depositing a reflective coating on the bump using the solder mask as a plating mask, thereby providing the bump with a reflective surface finish at the cavity;

then

mounting a second substrate and a second adhesive on the solder mask, thereby mounting the second substrate and the second adhesive on the ledge, wherein the second substrate includes a conductive trace and a second dielectric layer, the conductive trace includes a pad and a terminal and is located outside the cavity and beyond the ledge in the first vertical direction, the second dielectric layer is sandwiched between the conductive trace and the second adhesive and is solidified, the second adhesive is sandwiched between the second dielectric layer and the solder mask, the solder mask is sandwiched between the second adhesive and the ledge, a second aperture extends through the second substrate, a second opening extends through the second adhesive, the bump is aligned with and spaced from the second opening and the second aperture and the ledge is sandwiched between the first adhesive and the solder mask and covers the conductive trace in the second vertical direction;

mechanically attaching the second substrate to the solder mask using the second adhesive, thereby mechanically attaching the conductive trace to the ledge;

then

mounting a semiconductor device on the bump, wherein the semiconductor device extends into the cavity and the bump provides a recessed die paddle and a reflector for the semiconductor device;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the bump, thereby thermally connecting the semiconductor device to the base.

27. The method of claim 26, wherein providing the bump includes mechanically stamping a metal plate, thereby forming the bump in the metal plate and the cavity in the bump, wherein the bump is a stamped portion of the metal plate and the ledge is an unstamped portion of the metal plate.

28. The method of claim 26, wherein:

providing the first adhesive includes providing a prepreg with uncured epoxy;

flowing the first adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the ledge and the first substrate;

solidifying the first adhesive includes curing the uncured epoxy;

mounting the second adhesive includes providing a pressure-sensitive adhesive tape on the ledge; and

mechanically attaching the second substrate includes compressing the adhesive tape between the ledge and the second substrate.

29. The method of claim 26, wherein providing the base includes:

grinding the bump, the first adhesive and the first conductive layer such that the bump, the first adhesive and the first conductive layer are laterally aligned with one another at a lateral surface that faces in the second vertical direction; and

then

depositing the plated layer on the bump, the first adhesive and the first conductive layer.

30. The method of claim 26, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the bump, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the bump.