Processing of data integrity field

• US 8,365,057 B2
• Filed: 07/30/2009
• Issued: 01/29/2013
• Est. Priority Date: 07/30/2009
• Status: Active Grant

• Current Assignee: Mellanox Technologies Limited (NVIDIA Corporation)
• Original Assignee: Mellanox Technologies Limited (NVIDIA Corporation)
• Inventors: Goldenberg, Dror, Chapman, Hillel, Shochat, Achiad, Paneah, Peter, Azarzar, Tamir, Bohrer, Dror, Kagan, Michael
• Primary Examiner(s): LAMARRE, GUY J
• Application Number:
  US12/512,026
• Publication Number:
  US 20110029847A1
• Time in Patent Office: 1,279 Days
• Field of Search: 714/801, 714/819, 714/762, 714/788, 370/351
• US Class Current: 714/817
• CPC Class Codes: G06F 11/1004 to protect a block of data words, e.g. CRC or checksum G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00

Abstract

A network communication device includes a host interface, which is coupled to communicate with a host processor, having a memory, so as to receive a work request to convey one or more data blocks over a network. The work request specifies a memory region of a given data size, and at least one data integrity field (DIF), having a given field size, is associated with the data blocks. Network interface circuitry is configured to execute an input/output (I/O) data transfer operation responsively to the work request so as to transfer to or from the memory a quantity of data that differs from the data size of the memory region by a multiple of the field size, while adding the at least one DIF to the transferred data or removing the at least one DIF from the transferred data.

Claims

1. A network communication device, comprising:

a host interface, which is coupled to communicate with a host processor, having a memory, so as to receive a work request to convey one or more data blocks over a network, wherein the work request specifies a memory region of a given data size, and at least one data integrity field (DIF), having a given field size, is associated with the data blocks; and

network interface circuitry configured to execute an input/output (I/O) data transfer operation responsively to the work request so as to transfer to or from the memory a quantity of data that differs from the data size of the memory region by an integer multiple of the field size, while appending the at least one DIF to the data blocks that are transferred or removing the at least one DIF from the data blocks that are transferred.

2. The device according to claim 1, wherein the network interface circuitry comprises a DIF engine, which is configured to compute a value of the at least one DIF over the one or more data blocks.

3. The device according to claim 2, wherein the DIF engine is configured to verify the at least one DIF by comparing the computed value to a previously-generated value of the at least one DIF that is appended to the one or more data blocks.

4. The device according to claim 3, wherein the network interface circuitry is configured to generate a completion report, for output to the host processor, upon completion of the I/O data transfer, and to incorporate an error indication in the completion report when the DIF engine detects an error in verifying the at least one DIF.

5. The device according to claim 3, wherein the previously-generated value of the at least one DIF is computed in accordance with a first DIF type, and wherein the DIF engine is configured to remove the previously-generated value of the at least one DIF and to compute and append to the transferred data blocks a new DIF in accordance with a second DIF type.

6. The device according to claim 2, wherein the DIF engine is configured to interleave the at least one DIF with the one or more data blocks.

7. The device according to claim 2, wherein the DIF engine is configured to compute the value of the at least one DIF on the fly, without maintaining a copy of the transferred data.

8. The device according to claim 1, wherein the network interface circuitry comprises a DIF strip array for receiving the at least one DIF upon removal of the at least one DIF from the transferred data.

9. The device according to claim 1, wherein the data size of the memory region is equal to a number of bytes that are to be conveyed over the network by the I/O data transfer operation.

10. The device according to claim 1, wherein the memory region is defined in a virtual memory space, and wherein the network interface circuitry comprises a table containing parameters indicating a range of physical addresses in the memory corresponding to the virtual memory space, and the parameters include an offset corresponding to the at least one DIF that is to be appended to or removed from the transferred data blocks.

11. The device according to claim 1, wherein the work request corresponds to a command to write the data from a storage initiator to a storage target, and wherein the I/O data transfer operation comprises a RDMA read operation invoked in response to the work request, comprising a RDMA read request sent from the storage target to the storage initiator and a RDMA read response conveying the data from the storage initiator to the storage target.

12. The device according to claim 1, wherein the work request corresponds to a command from a storage initiator to read the data from a storage target, and wherein the I/O data transfer operation comprises a RDMA write operation, invoked in response to the work request, conveying the data from the storage initiator to the storage target.

13. A method for communication, comprising:

receiving a work request from a host processor to convey one or more data blocks over a network, wherein the work request specifies a memory region of a given data size, and at least one data integrity field (DIF), having a given field size, is associated with the data blocks; and

executing, using network interface circuitry, an input/output (I/O) data transfer operation responsively to the work request so as to transfer to or from the memory a quantity of data that differs from the data size of the memory region by an integer multiple of the field size, while appending the at least one DIF to the data blocks that are transferred or removing the at least one DIF from the data blocks that are transferred.

14. The method according to claim 13, wherein appending the at least one DIF comprises computing a value of the at least one DIF over the one or more data blocks.

15. The method according to claim 14, and comprising verifying the at least one DIF by comparing the computed value to a previously-generated value of the at least one DIF that is appended to the one or more data blocks.

16. The method according to claim 15, wherein executing the I/O data transfer comprises generating a completion report, for output to the host processor, upon completion of the I/O data transfer, and incorporating an error indication in the completion report when the DIF engine detects an error in verifying the at least one DIF.

17. The method according to claim 15, wherein the previously-generated value of the at least one DIF is computed in accordance with a first DIF type, and wherein removing the at least one DIF comprises removing the previously-generated value of the at least one DIF, and wherein appending the at least one DIF comprises computing and appending to the transferred data blocks a new DIF in accordance with a second DIF type.

18. The method according to claim 14, wherein appending the at least one DIF comprises interleaving the at least one DIF with the one or more data blocks.

19. The method according to claim 14, wherein the value of the at least one DIF is computed on the fly, without maintaining a copy of the transferred data.

20. The method according to claim 13, wherein removing the at least one DIF comprises transferring the at least one DIF to a DIF strip array upon removal of the at least one DIF from the transferred data.

21. The method according to claim 13, wherein the data size of the memory region is equal to a number of bytes that are to be conveyed over the network by the I/O data transfer operation.

22. The method according to claim 13, wherein the memory region is defined in a virtual memory space, and wherein executing the I/O data transfer operation comprises providing an entry in a table indicating a range of physical addresses in the memory corresponding to the virtual memory space, wherein the entry includes an offset corresponding to the at least one DIF that is to be appended to or removed from the transferred data blocks.

23. The method according to claim 13, wherein the work request corresponds to a command to write the data from a storage initiator to a storage target, and wherein the I/O data transfer operation comprises a RDMA read operation invoked in response to the work request, comprising a RDMA read request sent from the storage target to the storage initiator and a RDMA read response conveying the data from the storage initiator to the storage target.

24. The method according to claim 13, wherein the work request corresponds to a command from a storage initiator to read the data from a storage target, and wherein the I/O data transfer operation comprises a RDMA write operation, invoked in response to the work request, conveying the data from the storage initiator to the storage target.