Metal pad or metal bump over pad exposed by passivation layer

  • US 8,399,989 B2
  • Filed: 07/31/2006
  • Issued: 03/19/2013
  • Est. Priority Date: 07/29/2005
  • Status: Active Grant
First Claim
Patent Images

1. A semiconductor chip comprising:

  • a semiconductor substrate;

    a transistor on said semiconductor substrate;

    a copper pad over said semiconductor substrate;

    a tantalum-containing layer at a sidewall and a bottom surface of said copper pad;

    a copper seed layer at said sidewall and said bottom surface, wherein said copper seed layer is between said tantalum-containing layer and said copper pad;

    a single layer of a titanium-containing material directly on a top surface of said copper pad;

    a gold seed layer on said single layer of said titanium-containing material, wherein said gold seed layer contacts said single layer of said titanium-containing material; and

    an electroplated gold layer on said gold seed layer, wherein said electroplated gold layer has a thickness between 0.1 and 30 micrometers.

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