Method and apparatus for generating early or late sampling clocks for CDR data recovery
First Claim
1. A method for generating one or more non-uniform clock signals, said method comprising:
- generating a plurality of transition clock signals and data sampling clock signals having a substantially uniform phase separation; and
applying at least one of said transition clock signals and not said data sampling clock signals to one or more delay elements to generate said one or more non-uniform clock signals, wherein said one or more non-uniform clock signals has a non-uniform phase separation relative to said generated transition clock signals, wherein said delay is based on a sampling point for a threshold-based Decision Feedback Equalization.
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Abstract
Methods and apparatus are provided for a clock phase generator for CDR data sampling that generates early and/or late sampling clocks, relative to ideal transition and sample points. An early sampling clock is generated by generating a plurality of transition and data sampling clock signals having a substantially uniform phase separation; and delaying at least one of the transition clock signals to generate one or more early clock signals. A late sampling clock is generated by generating a plurality of transition and data sampling clock signals having a substantially uniform phase separation; and delaying at least one of the data sampling clock signals to generate one or more late clock signals. The early clock signals can be employed, for example, in a threshold-based decision feedback equalizer. The late clock signals can be employed, for example, in a classical decision feedback equalizer.
56 Citations
21 Claims
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1. A method for generating one or more non-uniform clock signals, said method comprising:
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generating a plurality of transition clock signals and data sampling clock signals having a substantially uniform phase separation; and applying at least one of said transition clock signals and not said data sampling clock signals to one or more delay elements to generate said one or more non-uniform clock signals, wherein said one or more non-uniform clock signals has a non-uniform phase separation relative to said generated transition clock signals, wherein said delay is based on a sampling point for a threshold-based Decision Feedback Equalization. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for generating one or more non-uniform clock signals, said method comprising:
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generating a plurality of transition clock signals and data sampling clock signals having a substantially uniform phase separation; and applying at least one of said data sampling clock signals and not said transition clock signals to one or more delay elements to generate said one or more non-uniform clock signals, wherein said one or more non-uniform clock signals has a non-uniform phase separation relative to said generated data sampling clock signals, wherein said delay is based on a sampling point for a threshold-based Decision Feedback Equalization. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
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20. A clock and data recovery clock phase generator for generating one or more non-uniform clock signals, comprising:
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a clock and data recovery system for processing a received signal to generate a plurality of transition clock signals and data sampling clock signals having a substantially uniform phase separation; and one or more delay elements for delaying at least one of said transition clock signals and not said data sampling clock signals to generate said one or more non-uniform clock signals, wherein said one or more non-uniform clock signals has a non-uniform phase separation relative to said generated transition clock signals, wherein said delay is based on a sampling point for a threshold-based Decision Feedback Equalization.
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21. A clock and data recovery clock phase generator for generating one or more non-uniform clock signals, comprising:
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a clock and data recovery system for processing a received signal to generate a plurality of transition clock signals and data sampling clock signals having a substantially uniform phase separation; and one or more delay elements for delaying at least one of said data sampling clock signals and not said transition clock signals to generate said one or more time-shifted clock signals, wherein said one or more non-uniform clock signals has a non-uniform phase separation relative to said generated data sampling clock signals, wherein said delay is based on a sampling point for a threshold-based Decision Feedback Equalization.
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Specification