Low AC resistance conductor designs

  • US 8,410,636 B2
  • Filed: 12/16/2009
  • Issued: 04/02/2013
  • Est. Priority Date: 09/27/2008
  • Status: Active Grant
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First Claim
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1. A device comprising:

  • a plurality of conductor layers arranged into a printed circuit board;

    a plurality of individual conductor traces on each one of the plurality of conductor layers; and

    a plurality of vias that connect individual ones of the plurality of conductor traces on different ones of the plurality of conductor layers into a stranded trace, the plurality of vias located on one or more outside edges of the stranded trace;

    wherein the plurality of individual conductor traces on each layer are routed from a first group of the plurality of vias on a first edge of the stranded trace in a plane of the printed circuit board to a second group of the plurality of vias on a second edge of the stranded trace in a plane of the printed circuit board in a substantially diagonal direction with respect to the first edge of the stranded trace.

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