System for increasing storage media performance

• US 8,417,871 B1
• Filed: 04/13/2010
• Issued: 04/09/2013
• Est. Priority Date: 04/17/2009
• Status: Active Grant

• Current Assignee: Innovations In Memory LLC
• Original Assignee: Violin Memory Incorporated
• Inventors: de la Iglesia, Erik
• Primary Examiner(s): Dudek, Jr., Edward
• Assistant Examiner(s): Verderamo, III, Ralph A
• Application Number:
  US12/759,604
• Time in Patent Office: 1,092 Days
• Field of Search: None
• US Class Current: 711/5
• CPC Class Codes: G06F 11/2094 Redundant storage or storage space G06F11/2056 takes precedence
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 3/0611 in relation to response time
• CPC Class Codes: G06F 3/065 Replication mechanisms
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0683 Plurality of storage devices

Abstract

A storage access system provides consistent memory access times for storage media with inconsistent access latency and reduces bottlenecks caused by the variable time delays during memory write operations. Data is written iteratively into multiple different media devices to prevent write operations from blocking all other memory access operations. The multiple copies of the same data then allow subsequent read operations to avoid the media devices currently servicing the write operations. Write operations can be aggregated together to improve the overall write performance to a storage media. A performance index determines how many media devices store the same data. The number of possible concurrent reads varies according to the number of media devices storing the data. Therefore, the performance index provides different selectable Quality of Service (QoS) for data in the storage media.

Claims

1. A system, comprising:

multiple media devices; and

a processor configured to;

receive data for write operations;

identify a group of three or more of the media devices for writing the data;

sequentially write the data into each of the three or more media devices in the identified group;

receive two or more read operations;

identify one of the media devices currently being written with the data; and

concurrently read data from address locations associated with the two or more read operations from two or more of the media devices in the group not currently being written with the data.

2. The system according to claim 1 wherein:

the media devices have variable write latencies; and

the processor is further configured to normalize read latencies for the media devices by concurrently reading the data from multiple ones of the media devices in the group that are not being used for writing data.

3. The system according to claim 1 wherein the media devices comprise flash solid state devices.

4. The system according to claim 1 wherein the processor is further configured to:

aggregate together a first set of the data for a first set of the write operations;

identify a first performance index associated with the first set of the data;

write the aggregated first set of data into sequential physical address locations so a first number of the media devices in the group of media devices associated with the first performance index can be read without being blocked by the writing of the aggregated first set of data;

aggregate together a second set of the data for a second set of the write operations;

identify a second performance index associated with the second set of the data; and

write the aggregated second set of data into sequential physical address locations so a second number of the media devices in an additional group of the media devices associated with the second performance index can be read without being blocked by the writing of the aggregated second set of data.

5. The system according to claim 4 wherein a size of the aggregated first and second set of data is variable and based on when the write operations are identified.

6. The system according to claim 1 wherein the processor is configured to:

identify a performance index for the write operations; and

identify a number of two or more of the media devices in the group for providing concurrent read operations based on the performance index.

7. The system according to claim 6 wherein the processor is further configured to write the data into one additional media device in addition to the identified number of the two or more media devices for providing concurrent read operations.

8. The system according to claim 6 wherein the processor is configured to identify a performance target for the particular write operation and map the performance target to the performance index.

9. The system according to claim 8 wherein the performance target corresponds with a read access time of the media devices.

10. The system according to claim 8 wherein the performance target corresponds with how many of the media devices are in the group.

11. The system according to claim 1 further comprising a memory storing an indirection table that maps write addresses used in the write operations to separate independently accessible locations in each one of the media devices in the identified group.

12. The system of claim 1 wherein the processor is configured to use a same physical address to store the data in each of the media devices.

13. An apparatus, comprising:

storage elements; and

a storage access system configured to;

perform write operations configured to write same data into the storage elements sequentially one at a time so a number of the storage elements remain available for read operations while the other storage elements are being written with the data, wherein the number of storage elements available for the read operations is associated with a selectable performance index;

map read addresses for the read operations to multiple different ones of the storage elements not currently being used for the write operations; and

concurrently read data during the read operations from the number of the storage elements associated with the performance index and not currently being used by the write operations.

14. The apparatus according to claim 13 wherein the storage elements comprise flash solid state devices.

15. The apparatus according to claim 13 wherein:

the storage elements are independently read and write accessible;

the storage access system is configured to iteratively write a same independently accessible copy of the same data into each of the multiple different storage elements to avoid blocking access of the read operations to the number of the storage elements associated with the performance index during the write operations.

16. The apparatus according to claim 13 wherein the storage access system normalizes read access times for variable latency storage elements by writing the data to three or more different storage elements and then reading back the data from two or more of the storage elements that are not currently being used for the write operations.

17. The apparatus according to claim 13 wherein the storage access system is further configured to:

aggregate together a first set of the data for a first set of the write operations;

write the first set of the data into sequential physical address locations for each one of a first group of the storage elements, wherein the storage access system is configured to perform concurrent read operations from the first group of storage elements not currently being written with the first set of data;

aggregate together a second set of the data for a second set of the write operations; and

write the second set of the data into sequential physical address locations for each of a second group of the storage elements different from the group of storage elements, wherein the storage access system is configured to perform concurrent read operations from the second group of storage elements not currently being written with the second set of data.

18. The apparatus according to claim 13 further comprising an indirection table configured to map the read addresses to physical addresses in the storage elements.

19. The apparatus according to claim 13 wherein the performance index maps to different numbers of groups of the storage elements and different numbers of storage elements within groups.

20. A method, comprising:

receiving data for write operations;

aggregating together a set of the data for a set of the write operations;

identifying a performance index for the set of the data;

performing sequential write operations for the aggregated set of the data into sequential physical address locations for each one of a group of media devices so a number of the media devices can be accessed by read operations during the sequential write operations, wherein the number of the media devices that can be accessed by the read operations during the write operations is based on the performance index.

21. The method of claim 20, further comprising:

aggregating together an additional set of the data for an additional set of the write operations;

identifying an additional performance index for the additional set of the data;

performing additional sequential write operations for the aggregated additional set of the data into sequential physical address locations for each one of an additional group of media devices so a number of the media devices can be accessed by additional read operations during the additional sequential write operations, wherein the number of the media devices that can be accessed by the additional read operations during the additional sequential write operations is based on the additional performance index.