Frequency selective digital transmission apparatus

• US 8,422,535 B2
• Filed: 04/26/2010
• Issued: 04/16/2013
• Est. Priority Date: 04/27/2009
• Status: Expired due to Fees

• Current Assignee: Electronics and Telecommunications Research Institute
• Original Assignee: Electronics and Telecommunications Research Institute
• Inventors: Lim, In Gi, Park, Hyung Il, Kang, Tae Wook, Hyoung, Chang Hee, Kang, Sung Weon, Hwang, Jung Hwan, Kim, Kyung Soo, Kim, Jung Bum, Kim, Sung Eun, Kim, Jin-Kyung, Myoung, Hey Jin, Hyun, Seok Bong, Park, Kyung Hwan, Choi, Byoung Gun, Kang, Tae Young
• Primary Examiner(s): Bocure, Tesfaldet
• Application Number:
  US12/767,430
• Publication Number:
  US 20100272159A1
• Time in Patent Office: 1,086 Days
• Field of Search: 375/130, 375/140, 375/145, 375/146, 375/377, 370/329, 370/335, 370/342, 370/441
• US Class Current: 375/146
• CPC Class Codes: H04J 11/003 at the transmitter transmission to multiple receive units in multiple input multiple output [MIMO] H04B7/0452; transmit antenna weighting H04B7/0615
• CPC Class Codes: H04J 13/0048 Walsh
• CPC Class Codes: H04J 13/18 Allocation of orthogonal codes

Abstract

A frequency selective digital transmission apparatus includes: a preamble transmission processing unit generating a preamble for frame synchronization and spreading the generated preamble with a predetermined spreading code; a header transmission processing unit configuring a header including data attribute information and spreading the header with a predetermined spreading code; a data transmission processing unit performing serial-to-parallel conversion on transmission data according to a selected transmission mode and a spreading scheme and spreading the same with a frequency selective spreading code; and a multiplexing unit multiplexing the preamble, the header, and the data which have been spread by the preamble transmission processing unit, the header transmission processing unit and the data transmission processing unit, respectively, and transmitting the same as digital signals.

Claims

1. A frequency selective digital transmission apparatus comprising:

a preamble transmission processing unit generating a preamble for frame synchronization and spreading the generated preamble with a predetermined spreading code;

a header transmission processing unit configuring a header including data attribute information and spreading the header with a predetermined spreading code;

a data transmission processing unit performing serial-to-parallel conversion on transmission data according to a selected transmission mode and a spreading scheme and spreading the serial-to-parallel converted transmission data with a frequency selective spreading code; and

a multiplexing unit multiplexing the preamble, the header, and the transmission data which have been spread by the preamble transmission processing unit, the header transmission processing unit and the data transmission processing unit, respectively, and transmitting the preamble, the header, and the transmission data as digital signals.

2. The apparatus of claim 1, wherein the data transmission processing unit divides 2N (N is a real number) number of spreading codes by 2M (M is a real number and M<

N) to generate a plurality of sub-groups, and selectively uses P (P is a real number) number of sub-groups among the plurality of generated sub-groups.

3. The apparatus of claim 2, wherein the data transmission processing unit comprises:

a serial-to-parallel converter performing serial-to-parallel conversion on the transmission data at a pre-set rate; and

a frequency selective spreader receiving an output from the serial-to-parallel converter and spreading the transmission data according to one selected from among a high speed spreading scheme and a low speed spreading scheme.

4. The apparatus of claim 3, wherein the frequency selective spreader comprises:

a high speed frequency selective spreader spreading the transmission data according to the high speed spreading scheme;

a low speed frequency selective spreader spreading the transmission data according to the low speed spreading scheme; and

a multiplexer selectively outputting one of output values of the high speed frequency selective spreader and the low speed frequency selective spreader according to the selected spreading scheme.

5. The apparatus of claim 4, wherein when the high speed spreading scheme is selected, the serial-to-parallel converter converts the transmission data into parallel data of P*(M+1) bits and outputs the same, and

wherein the high speed frequency selective spreader comprises:

P number of sub-frequency selective spreaders receiving (M+1) number of data bits from the serial-to-parallel converter and selecting one spreading code from a corresponding sub-group by using M number of data bits, and XORing the remaining one data bit to the selected value to acquire a spreading code; and

a majority value selection unit selecting a majority value from the P number of spreading codes acquired by the P number of sub-frequency selective spreaders, respectively.

6. The apparatus of claim 4, wherein when the high speed spreading scheme is selected, the serial-to-parallel converter converts the transmission data into parallel data of P*M bits and outputs the same, and

wherein the high speed frequency selective spreader comprises:

P number of sub-frequency selective spreaders selecting one spreading code from a corresponding sub-group by using M number of data bits received from the serial-to-parallel converter; and

a majority value selection unit selecting a majority value from P number of spreading codes selected by the P number of sub-frequency frequency selective spreaders, respectively.

7. The apparatus of claim 4, wherein when the low speed spreading scheme is selected, the serial-to-parallel converter converts the transmission data into parallel data of S+(M+1) bits and outputs the same, and

wherein the low speed frequency selective spreader comprises:

Q number of sub-frequency selective spreaders receiving (M+1) number of data bits from the serial-to-parallel converter and selecting one spreading code from a corresponding sub-group by using M number of data bits, and XORing the remaining one data bit to the selected value to acquire a spreading code; and

a multiplexer selecting one spreading code by using the remaining S number of data bits from the Q number of spreading codes acquired by the Q number of sub-frequency selective spreaders, respectively.

8. The apparatus of claim 4, wherein when the low speed spreading scheme is selected, the serial-to-parallel converter converts the transmission data into parallel data of S+M bits and outputs the same, and

wherein the low speed frequency selective spreader comprises:

Q number of sub-frequency selective spreaders selecting one spreading code from a corresponding sub-group by using M number of data bits received from the serial-to-parallel converter; and

a multiplexer selecting one spreading code by using the remaining S number of data bits from Q number of spreading codes selected by the Q number of sub-frequency frequency selective spreaders, respectively.

9. The apparatus of claim 1, wherein the data transmission processing unit operates at a different clock and different symbol rate according to a transmission mode selected from among the general mode, the low power mode, and the high performance mode.

10. The apparatus of claim 9, wherein when the high performance mode is selected, the data transmission processing unit uses only a portion of output bits of the frequency selective spreading codes.

11. The apparatus of claim 10, wherein when the number of output bits of the frequency selective spreading codes is N, the data transmission processing unit uses N/2 number of bits positioned in the middle.

12. The apparatus of claim 3, wherein the data transmission processing unit supports various transmission rates by adjusting the number of output bits of the frequency selective spreader per output symbol of the serial-to-parallel converter.

13. A frequency selective digital transmission apparatus comprising:

a preamble transmission processing unit generating a preamble for frame synchronization and spreading it with a predetermined spreading code;

a header and data transmission processing unit performing serial-to-parallel conversion on a header and transmission data including data attribute information and spreading the serial-to-parallel converted header and transmission data with a frequency selective spreading code according to a selected transmission mode and a spreading scheme; and

a multiplexing unit multiplexing the preamble, the header, and the transmission data which have been spread by the preamble transmission processing unit and the header and data transmission processing, respectively, and transmitting the preamble, the header, and the transmission data as digital signals.