Memory initialization by performing parallel execution of firmware and kernel by different CPUs
First Claim
Patent Images
1. A memory initialization method in a boot sequence of an information processing apparatus having a memory and a plurality of processors sharing the memory, the memory initialization method comprising:
- initializing a first area of the memory required for an operation of the firmware and a second area of the memory required for a kernel activation by executing the firmware stored in a first storage by a first processor;
storing the kernel to the initialized second area from a second storage by executing the firmware by the first processor;
making a second processor activate and execute the kernel stored in the second area by executing the firmware by the first processor; and
initializing a remaining area of the memory by the kernel executed by the second processor and the firmware executed by the first processor in parallel.
1 Assignment
0 Petitions
Accused Products
Abstract
A memory initialization method in a boot sequence of an information processing apparatus having a memory and a plurality of processors sharing the memory, the memory initialization method includes initializing a first area of the memory required for an operation of the firmware and a second area of the memory required for a kernel activation by executing the firmware stored in a first storage by a first processor, storing the kernel to the initialized second area from a second storage by executing the firmware by the first processor, making a second processor activate and execute the kernel stored in the second area by executing the firmware by the first processor, and initializing a remaining area of the memory by the kernel executed by the second processor and the firmware executed by the first processor in parallel.
5 Citations
19 Claims
-
1. A memory initialization method in a boot sequence of an information processing apparatus having a memory and a plurality of processors sharing the memory, the memory initialization method comprising:
-
initializing a first area of the memory required for an operation of the firmware and a second area of the memory required for a kernel activation by executing the firmware stored in a first storage by a first processor; storing the kernel to the initialized second area from a second storage by executing the firmware by the first processor; making a second processor activate and execute the kernel stored in the second area by executing the firmware by the first processor; and initializing a remaining area of the memory by the kernel executed by the second processor and the firmware executed by the first processor in parallel. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A non-transitory computer-readable medium recording a memory initialization program in a boot sequence of an information processing apparatus having a memory and a plurality of processors for directing a processor to perform a process, comprising:
-
initializing a first area of the memory required for an operation of the memory initialization program and a second area of the memory required for a kernel activation by executing the firmware stored in a first storage by a first processor; storing the kernel to the initialized second area from a second storage by the first processor; making a second processor activate and execute the kernel stored in the second area by the first processor; and initializing a remaining area of the memory by the first processor with the kernel executed by the second processor in parallel.
-
-
10. The non-transitory computer-readable recording medium according 9, wherein
the kernel manages the memory by using virtual address; - and
the initializing of the remaining area of the memory includes separating the remaining area of the memory in an area managed by the kernel and an area managed by the memory initializing program, dividing the separated area managed by the kernel in a plurality of logical pages, generating a page table for converting a divided logical page into a physical page of the memory, and initializing the plurality of logical pages via the kernel executed by the second processor and the separated area managed by the memory initializing program by the first processor in parallel. - View Dependent Claims (11)
- and
-
12. An information processing apparatus performing memory initialization in a boot sequence of the information processing apparatus having a memory and a plurality of processor, the information processing apparatus comprising:
-
a first initializing unit that initializes a first area of the memory required for an operation of the firmware and a second area of the memory required for a kernel activation by executing the firmware stored in a first storage by a first processor; a controlling unit that stores the kernel to the initialized second area from a second storage by executing the firmware by the first processor, and makes a second processor activate and execute the kernel stored in the second area by executing the firmware by the first processor; and a second initializing unit that initializes a remaining area of the memory by the kernel executed by the second processor and the firmware executed by the first processor in parallel. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19)
-
Specification
-
- Resources
Litigation Campaign Assessment
Thank you for your request. You will receive a custom alert email when the Litigation Campaign Assessment is available.
×
-
Current AssigneeFujitsu Limited
-
Original AssigneeFujitsu Limited
-
InventorsTakai, Tetsuo
-
Primary Examiner(s)WANG, ALBERT C
-
Application NumberUS13/095,396Publication NumberTime in Patent Office720 DaysField of Search713/2, 714/718US Class Current713/2CPC Class CodesG06F 9/4401 Bootstrapping security arra...
