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Temperature compensation circuit

  • US 8,427,227 B2
  • Filed: 02/23/2012
  • Issued: 04/23/2013
  • Est. Priority Date: 01/15/2009
  • Status: Expired due to Fees
First Claim
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1. A temperature compensation circuit comprising:

  • a first transistor having a control terminal supplied with a first signal;

    a first resistor having a first end connected to an output of the first transistor;

    a second transistor having a control terminal supplied with a second signal;

    a second resistor having a first end connected to an output of the second transistor;

    a third resistor having a first end connected to a first connection point to which a second end of the first resistor and a second end of the second resistor are commonly connected;

    a constant voltage element connected to the third resistor;

    a third transistor having a control terminal connected to the first end of the first resistor;

    a fourth transistor having a control terminal connected to the first end of the second resistor;

    a fifth transistor having a control terminal supplied with the first signal;

    a first control circuit having a first input terminal connected to an output of the fifth transistor and supplied with a first current outputted from the fifth transistor, a second input terminal connected to a fourth resistor wherein a second current flows through the second input terminal, and an output terminal outputting a third current depending on a difference between a value of the first current and a value of the second current;

    a sixth transistor having a control terminal supplied with the third current;

    a seventh transistor having a control terminal which is connected to the control terminal of the sixth transistor, is supplied with the third current, and outputs a current depending on the third current to a second connection point to which the fourth and fifth transistors are commonly connected;

    an eighth transistor having a control terminal connected to the control terminal of the sixth transistor;

    a first mirror circuit connected to the eiqhth transistor; and

    a second mirror circuit connected to the first mirror circuit.

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