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In-plane switching type liquid crystal display device

  • US 8,436,972 B2
  • Filed: 03/03/2010
  • Issued: 05/07/2013
  • Est. Priority Date: 09/27/2006
  • Status: Active Grant
First Claim
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1. A liquid crystal display device comprising a pair of substrates having aligning-treated surfaces that have been subjected to an aligning treatment in directions parallel but opposite to each other, the substrates being arranged so that the respective aligning-treated surfaces are opposed to each other with a liquid crystal layer therebetween;

  • wherein, for forming each of a plurality of pixels in a matrix shape in a row direction and a column direction and thus forming a display region, a first electrode, a thin film transistor, a signal line, and a second electrode are provided at a first substrate of the pair of substrates,wherein the first electrode has a plurality of slits each of which comprises a plurality of opening regions that are formed so as to be serially continuous, wherein the opening regions extend in directions different from each other and different from the directions of the aligning treatment,wherein the thin film transistor has a source electrode, a drain electrode and a semiconductor film, wherein the source electrode is connected to the first electrode,wherein the signal line is connected to the drain electrode and is formed in the column direction,wherein the second electrode overlaps in a plan view with a region of the plurality of slits via an insulating layer,wherein the first electrode comprises a transparent conductive film corresponding to one of the plurality of pixels, and wherein the plurality of slits are arranged on the transparent conductive film along the row direction,wherein each of the plurality of slits has;

    first and second linear sections, the first linear section extending in a first direction that crosses the directions of the aligning treatment at a first crossing angle, and the second linear section extending in a second direction that crosses the directions of the aligning treatment at a second crossing angle, wherein the first crossing angle is different from the second crossing angle;

    a first bent section that extends in a third direction that crosses the directions of the aligning treatment at a third crossing angle larger than the first crossing angle, wherein the first bent section is continuous to a first end of the first linear section;

    a second bent section that extends in a fourth direction that crosses the directions of the aligning treatment at a fourth crossing angle larger than the second crossing angle, wherein the second bent section is continuous to a first end of the second linear section, and wherein the first end of the first linear section and the first end of the second linear section are adjacent to each other; and

    a connection section that connects the first and second bent sections,wherein given a length A1 of the semiconductor film of the thin film transistor in the directions of the aligning treatment and a length A2 of the source electrode of the thin film transistor in the directions of the aligning treatment, A1 is larger than A2,wherein the second electrode has first and second notches so as not to overlap with a region corresponding to the thin film transistor, and given a length B1 of the first notch corresponding to the semiconductor film in the directions of the aligning treatment and a length B2 of the second notch corresponding to the source electrode in the directions of the aligning treatment, B1 is larger than B2,wherein slits on a side closer to the signal line among the plurality of slits of the first electrode are provided with lengths shorter than lengths of the other slits so as not to overlap with the region corresponding to the thin film transistor, andwherein a slit adjacent to the source electrode in the directions of the aligning treatment among the slits on the side closer to the signal line extends to a bump formed in the second electrode by the first and second notches, the slit being provided with a length longer than a length of a slit adjacent to the semiconductor film in the directions of the aligning treatment.

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