High-frequency switch circuit

• US 8,441,304 B2
• Filed: 04/08/2011
• Issued: 05/14/2013
• Est. Priority Date: 04/19/2010
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Okashita, Tomonori, Kinoshita, Yuta
• Primary Examiner(s): Donovan, Lincoln
• Assistant Examiner(s): Chen, Sibin
• Application Number:
  US13/082,913
• Publication Number:
  US 20110254612A1
• Time in Patent Office: 767 Days
• Field of Search: 327/427, 327/429, 327/434, 327/436, 327/437
• US Class Current: 327/427
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00

Abstract

A high-frequency switch circuit according to the present invention includes at least a first switch connected between a common terminal and a first terminal, and a second switch connected between the common terminal and a second terminal. Each of the first and second switches includes a plurality of field-effect transistors connected in series and each having a body, a source, a drain, and a gate. A compensation capacitance that compensates a parasitic capacitance generated when the first switch is in an off-state is formed between the drain and the body or between the source and the body in the FET of the first switch. A compensation capacitance that compensates a parasitic capacitance generated when the second switch is in an off-state is formed between the drain and the body or between the source and the body in the FET of the second switch.

Claims

1. A high-frequency switch circuit comprising:

a first switch that is connected between a common terminal and a first terminal; and

a second switch that is connected between the common terminal and a second terminal,

wherein each of the first and second switches includes a plurality of field-effect transistors connected in series and each having a body, a source, a drain, and a gate,

a compensation capacitance that compensates a parasitic capacitance generated when the first switch is in an off-state is formed between the drain and the body or between the source and the body in at least one of the plurality of field-effect transistors of the first switch, and

a compensation capacitance that compensates a parasitic capacitance generated when the second switch is in an off-state is formed between the drain and the body or between the source and the body in at least one of the plurality of field-effect transistors of the second switch.

2. The high-frequency switch circuit according to claim 1, wherein a unit device of the field-effect transistors is a multi-finger type field-effect transistor that includes a plurality of body regions, a plurality of source and drain electrodes arranged on both sides of the plurality of body regions, a plurality of gate insulators respectively arranged on the plurality of body regions, and a plurality of gate electrodes respectively arranged on the plurality of gate insulators.

3. The high-frequency switch circuit according to claim 2, wherein the field-effect transistor is formed on an embedded oxide film, the body region is disposed between the embedded oxide film and the drain electrode and between the embedded oxide film and the source electrode, and the compensation capacitance is formed by setting a width of the drain electrode to be wider than a width of the source electrode or by having the width of the source electrode wider than the width of the drain electrode in the multi-finger type field-effect transistor.

4. The high-frequency switch circuit according to claim 2, wherein the compensation capacitance is formed by increasing a contact area between the body region and the drain electrode or by increasing a contact area between the body region and the source electrode.

5. The high-frequency switch circuit according to claim 2, wherein the compensation capacitance is formed by forming a body region having drain electrodes formed on both sides or by forming a body region having source electrodes formed on both sides in at least one of the multi-finger type field-effect transistors.

6. The high-frequency switch circuit according to claim 1, wherein the field-effect transistor is formed on an embedded oxide film.

7. The high-frequency switch circuit according to claim 1, wherein the compensation capacitance reduces an odd function component generated when a drain-to-source capacitance is expressed as a function with respect to a drain-to-source voltage, by compensating the parasitic capacitance generated between the body and a ground when the field-effect transistor is in an off-state.

8. The high-frequency switch circuit according to claim 1, wherein the compensation capacitances are formed in each of the field-effect transistors of the first and second switches.

9. The high-frequency switch circuit according to claim 1, wherein the high-frequency switch circuit switches on-state and off-state of any switch among switches connected between N (N is an integer) number of input terminals and M (M is an integer) number of output terminals.

10. A high-frequency switch circuit comprising:

a first switch that is connected between a common terminal and a first terminal; and

a second switch that is connected between the common terminal and a second terminal,

wherein each of the first and second switches includes a plurality of field-effect transistors connected in series and each having a body, a source, a drain, and a gate,

a compensation capacitance that compensates a parasitic capacitance generated when the first switch is in an off-state is formed between the drain and the body or between the source and the body in at least one of the plurality of field-effect transistors of the first switch, and

a compensation capacitance that compensates a parasitic capacitance generated when the second switch is in an off-state is formed between the drain and the body or between the source and the body in at least one of the plurality of field-effect transistors of the second switch,

wherein a unit device of the field-effect transistors is a multi-finger type field-effect transistor that includes a plurality of body regions, a plurality of source and drain electrodes arranged on both sides of the plurality of body regions, a plurality of gate insulators respectively arranged on the plurality of body regions, and a plurality of gate electrodes respectively arranged on the plurality of gate insulators.

11. The high-frequency switch circuit according to claim 10, wherein the compensation capacitance is formed by increasing a contact area between the body region and the drain electrode or by increasing a contact area between the body region and the source electrode.

12. The high-frequency switch circuit according to claim 10, wherein the compensation capacitance is formed by forming a body region having drain electrodes formed on both sides or by forming a body region having source electrodes formed on both sides in at least one of the multi-finger type field-effect transistors.

13. The high-frequency switch circuit according to claim 10, wherein the field-effect transistor is formed on an embedded oxide film.

14. The high-frequency switch circuit according to claim 10, wherein the field-effect transistor is formed on an embedded oxide film, the body region is disposed between the embedded oxide film and the drain electrode and between the embedded oxide film and the source electrode, and the compensation capacitance is formed by setting a width of the drain electrode to be wider than a width of the source electrode or by having the width of the source electrode wider than the width of the drain electrode in the multi-finger type field-effect transistor.

15. The high-frequency switch circuit according to claim 10, wherein the compensation capacitance reduces an odd function component generated when a drain-to-source capacitance is expressed as a function with respect to a drain-to-source voltage, by compensating the parasitic capacitance generated between the body and a ground when the field-effect transistor is in an off-state.

16. The high-frequency switch circuit according to claim 10, wherein the compensation capacitances are formed in each of the field-effect transistors of the first and second switches.

17. The high-frequency switch circuit according to claim 10, wherein the high-frequency switch circuit switches on-state and off-state of any switch among switches connected between N (N is an integer) number of input terminals and M (M is an integer) number of output terminals.