Low I/O bandwidth method and system for implementing detection and identification of scrambling codes

• US 8,442,096 B2
• Filed: 07/08/2009
• Issued: 05/14/2013
• Est. Priority Date: 12/12/2001
• Status: Expired due to Term

• Current Assignee: Cornami, Inc.
• Original Assignee: QST Holdings LLC
• Inventors: Sambhwani, Sharad, Heidari, Ghobad
• Primary Examiner(s): Tran, Khanh C
• Application Number:
  US12/499,756
• Publication Number:
  US 20090268789A1
• Time in Patent Office: 1,406 Days
• Field of Search: 375/142, 375/143, 375/147, 375/150, 375/152, 375/222, 375/260, 375/295, 375/316, 375/343, 370/335, 370/342, 708422-426
• US Class Current: 375/150
• CPC Class Codes: H04B 1/70735 Code identification H04B1/7083 takes precedence
• CPC Class Codes: H04B 1/70752 Partial correlation
• CPC Class Codes: H04B 1/708 Parallel implementation
• CPC Class Codes: H04B 1/7083 Cell search, e.g. using a three-step approach
• CPC Class Codes: H04B 1/7095 Sliding correlator type

Abstract

A system for detecting and identifying the identity of a base station or cell which transmits a scrambling code is provided. According to one aspect of the system, the system is used to perform scrambling code detection of eight (8) primary cells (each scrambling code'"'"'s X-component being spaced sixteen (16) chips apart) in a group. According to another aspect of the system, a single scrambling code generator is used to generate a master scrambling code. The master scrambling code is then used to create individual scrambling codes which are used in correlation with received signals to detect in parallel which one of the eight (8) possible primary cells in the group transmitted the received signals. According to yet another aspect of the system, each of the correlators maintains a corresponding X-component segment of the master scrambling code. For every sixteen (16) chips, a new X-component segment of the master scrambling code is introduced into one of the correlators, a X-component segment of the master scrambling code is dropped from another correlator, and X-component segments of the master scrambling code are sequentially shifted or propagated through the remaining correlators; and concurrent correlations are performed by the correlators using their respective corresponding X-component segments of the master scrambling code and newly received signals.

Claims

1. A system for identifying a scrambling code in received signals comprising:

a first plurality of heterogeneous computational elements, each of the computational elements performing an arithmetic operation;

a switchable interconnection network coupled to the first plurality of heterogeneous computational elements to configure the first plurality of heterogeneous computational elements as a scrambling code generator generating a plurality of segments forming a plurality of sequential chips of a master scrambling code, the configuration performed by switching the interconnections between the first plurality of heterogeneous computational elements;

a second plurality of heterogeneous computational elements, each of the computational elements performing an arithmetic operation and each coupled to the interconnection network, the second plurality of heterogeneous computational elements configured as a plurality of correlators configured to correlate in parallel the received signals with corresponding segments, a first correlator of the plurality of correlators configured to receive a next corresponding segment generated by the scrambling code generator, each remaining correlator of the plurality of correlators configured to receive its next corresponding segment from another correlator of the plurality of correlators, the configuration performed by switching the interconnections between the second plurality of heterogeneous computational elements.

2. The system of claim 1, wherein the interconnection network reconfigures some of the second plurality of heterogeneous computational elements configured as the first correlator as one of the remaining correlators.

3. The system of claim 1, wherein at least one of the first plurality of computational elements is one of the second plurality of computational elements, the second plurality of computational elements being configured after the plurality of segments is generated by the configured scrambling code generator.

4. The system of claim 1, wherein the first and second plurality of heterogeneous computational elements and the interconnection network are on an integrated circuit.

6. The system of claim 1, wherein, following each correlation, the plurality of correlators are configured to receive a new set of received signals.

7. The system of claim 1, wherein the plurality of correlators are configured to generate correlation results;

wherein the correlation results generated by the plurality of correlators are evaluated to identify the scrambling code from the received signals to determine the identity of a base station which transmitted one of the signals which the received signals comprise.

8. The system according to claim 7, wherein the base station is in a Wide-band Code Division Multiple Access (W-CDMA) communication network.

9. The system of claim 7 wherein the base station is one of a plurality of base stations of a communication network.

10. The system of claim 1, wherein the predetermined group chip offset is determined by the number of base stations in a base station group and a predetermined chip offset.

11. The system of claim 1, wherein the number of the plurality of correlators depends on the number of base stations in a base station group.

12. The system of claim 1, wherein each segment of the plurality of segments has a length of chips determined by a predetermined chip offset.

5. The system of clam 1, wherein the system is incorporated on a mobile terminal.

13. A system for identifying a scrambling code in received signals comprising:

a first plurality of heterogeneous computational elements, each of the computational elements performing an arithmetic operation;

a switchable interconnection network coupled to the first plurality of heterogeneous computational elements to configure the first plurality of heterogeneous computational elements as a scrambling code generator generating a plurality of segments forming a plurality of sequential chips of a master scrambling code, the configuration performed by switching the interconnections between the first plurality of heterogeneous computational elements;

a second plurality of heterogeneous computational elements, each of the computational elements performing an arithmetic operation and each coupled to the interconnection network, the second plurality of heterogeneous computational elements configured as a plurality of correlators including a first correlator, a last correlator and a plurality of intermediate correlators coupled between the first correlator and the last correlator, the plurality of correlators configured to perform correlations in parallel, each correlator of the plurality of correlators being populated with a corresponding segment generated by the scrambling code generator and each correlator receives a set of received data samples and correlates the received data samples with corresponding segments in parallel; and

wherein after each parallel correlation by the plurality of correlators, the plurality of intermediate correlators and the last correlator transfer their corresponding segments to another correlator, the first correlator is discarding the corresponding segment, and the last correlator receives a new segment generated by the scrambling code generator.

14. The system of claim 13, wherein the interconnection network reconfigures some of the second plurality of heterogeneous computational elements configured as the first correlator as one of the remaining correlators.

15. The system of claim 13, wherein at least one of the first plurality of computational elements is one of the second plurality of computational elements, the second plurality of computational elements being configured after the plurality of segments is generated by the configured scrambling code generator.

16. The system of claim 13, wherein the first and second plurality of heterogeneous computational elements and the interconnection network are on an integrated circuit.

18. The system of claim 13, wherein, following each correlation, each of the plurality of correlators is configured to receive a new set of received data samples.

19. The system of claim 13, wherein the number of the plurality of correlators depends on the number of base stations in a base station group in a communication network.

20. The system of claim 19, wherein the communication network is a Wide-band Code Division Multiple Access (W-CDMA) communication network and the system is used in connection with acquisition of a downlink of a 3GPP standards body W-CDMA cell during stage 3 of a cell search procedure.

21. The system of claim 13, wherein the last correlator is configured to receive a next segment which sequentially follows the previous corresponding segment utilized by the last correlator.

17. The system of clam 13, wherein the system is incorporated on a mobile terminal.

22. A method for identifying a scrambling code in received signals comprising:

selecting a correlation length;

configuring a first plurality of heterogeneous computational elements, each of the computational elements performing an arithmetic operation, via a switchable interconnection network as a scrambling code generator to identify a plurality of segments forming a plurality of sequential chips of a master scrambling code using the selected correlation length;

configuring a second plurality of heterogeneous computational elements, each of the computational elements performing an arithmetic operation via the interconnection network, as a plurality of correlators;

populating each of the plurality of correlators configured from the second plurality of heterogeneous computational elements with a corresponding segment;

providing a set of received data samples to each of the plurality of correlators;

correlating the set of received data samples with its corresponding segment of the corresponding correlator;

transferring the corresponding segments of all but one of the plurality of correlators to their respective next correlators; and

populating one of the plurality of correlators with a next sequential segment.

23. The method of claim 22, wherein the interconnection network reconfigures some of the second plurality of heterogeneous computational elements configured as a first correlator of the plurality of correlators as one of the remaining correlators in the plurality of correlators.

24. The method of claim 22, wherein at least one of the first plurality of computational elements is one of the second plurality of computational elements, the second plurality of computational elements being configured after the plurality of segments is generated by the configured scrambling code generator.

25. The method of claim 22, wherein the first and second plurality of heterogeneous computational elements and the interconnection network are on an integrated circuit.

27. The method of claim 22, further comprising:

storing corresponding correlation results generated by the plurality of correlators; and

evaluating the stored correlation results to identify the scrambling code from the signals received to identify a base station which transmitted one of the signals which the received signals comprise.

28. The method of claim 27, wherein the base station is in a Wide-band Code Division Multiple Access (W-CDMA) communication network and the method is used in connection with acquisition of a downlink of a 3GPP standards body W-CDMA cell during stage 3 of a cell search procedure.

26. The method of clam 22, wherein the first and second plurality of heterogeneous computational elements and the interconnection network are incorporated on a mobile terminal.

29. A method for identifying a scrambling code in received signals comprising:

identifying a plurality of segments forming a plurality of sequential chips of a master scrambling code;

configuring a first plurality of heterogeneous computational elements, each of the computational elements performing an arithmetic operation, via a switchable interconnection network as a plurality of correlators;

iteratively and successively correlating a number of segments of the plurality of segments with corresponding sets of received data samples via the correlators; and

for each correlation iteration;

providing a new set of received data samples;

correlating the new set of received data samples with the number of segments; and

after each correlation iteration is completed, refreshing the number of segments in a first-in-first-out basis by discarding one segment and providing another segment.

30. The method of claim 29, wherein the interconnection network reconfigures some of the second plurality of heterogeneous computational elements configured as a first correlator of the plurality of correlators are reconfigured as one of the remaining correlators of the plurality of correlators.

31. The method of claim 29, wherein the first plurality of heterogeneous computational elements and the interconnection network are on an integrated circuit.

33. The method of claim 29, further comprising:

storing correlation results for each correlation iteration; and

evaluating the collectively stored correlation results to identify the scrambling code from the signals received to identify a base station in a communication network which transmitted one of the signals which the received signals comprise.

34. The method of claim 33, wherein the communication network is a Wide-band Code Division Multiple Access (W-CDMA) communication network and the method is used in connection with acquisition of a downlink of a 3GPP standards body W-CDMA cell during stage 3 of a cell search procedure.

35. The method of claim 29, wherein, for each correlation iteration, the correlating further comprises:

concurrently correlating the new set of received data samples with each of the number of segments.

36. The method of claim 29, further comprising:

selecting a correlation length; and

wherein a total length of the sequential chips correlated depends on the correlation length and a predetermined group chip offset; and

wherein the predetermined group chip offset depends on the number of base stations in a base station group in a communication network and a predetermined chip offset between two adjacent base stations in the base station group.

37. The method of claim 29, further comprising:

selecting a correlation length; and

wherein a total length of the sequential chips correlated depends on the correlation length and a predetermined group chip offset; and

wherein the number of successive correlation iterations depends on the selected correlation length and the number of segments being correlated during each correlation iteration.

32. The method of clam 29, wherein the first and second plurality of heterogeneous computational elements and the interconnection network are incorporated on a mobile terminal.

38. A method for identifying a scrambling code in received signals comprising:

identifying a plurality of segments forming a plurality of sequential chips of a master scrambling code;

configuring a first plurality of heterogeneous computational elements, each of the computational elements performing an arithmetic operation, via a switchable interconnection network coupled to the first plurality of heterogeneous computational elements as a scrambling code generator to generate the plurality of segments one segment at a time;

configuring a second plurality of heterogeneous computational elements, each of the computational elements performing an arithmetic operation via the interconnection network, as a plurality of correlators having a first correlator, a last correlator and a plurality of intermediate correlators coupled between the first correlator and the last correlator;

populating each of the plurality of correlators with a corresponding segment generated by the scrambling code generator;

iteratively and successively correlating corresponding segments with corresponding sets of received data samples; and

for each correlation iteration;

providing a new set of received data samples;

correlating the new set of received data samples with corresponding segments and storing respective correlation results;

transferring the corresponding segments of the plurality of intermediate correlators and the last correlator to their respective next correlators;

transferring to the last correlator a next corresponding segment generated by the scrambling code generator.

39. The method of claim 38, wherein the interconnection network reconfigures some of the second plurality of heterogeneous computational elements configured as the first correlator are reconfigured as one of the remaining correlators.

40. The method of claim 38, wherein at least one of the first plurality of computational elements is one of the second plurality of computational elements, the second plurality of computational elements being configured after the plurality of segments is generated by the configured scrambling code generator.

41. The method of claim 38, wherein the first and second plurality of heterogeneous computational elements and the interconnection network are on an integrated circuit.

43. The method of claim 38, further comprising:

for each correlation iteration, discarding the corresponding segment of the first correlator.

44. The method of claim 38, wherein the plurality of correlators correlate concurrently.

45. The method of claim 38, further comprising:

selecting a correlation length;

wherein a total length of the sequential chips correlated depends on the correlation length and a predetermined group chip offset; and

wherein the predetermined group chip offset depends on the number of base stations in a base station group in a communication network and a predetermined chip offset between two adjacent base stations in the base station group.

46. The method according to claim 45, wherein the communication network is a Wide-band Code Division Multiple Access (W-CDMA) communication network and the method is used in connection with acquisition of a downlink of a 3GPP standards body W-CDMA cell during stage 3 of a cell search procedure.

47. The method of claim 38, further comprising:

selecting a correlation length;

wherein a total length of the sequential chips correlated depends on the correlation length and a predetermined group chip offset; and

wherein the number of successive correlation iterations depends on the selected correlation length and the collective length of the sets of received data samples.

42. The method of clam 38, wherein the first and second plurality of heterogeneous computational elements and the interconnection network are incorporated on a mobile terminal.