SOI switch enhancement

  • US 8,461,903 B1
  • Filed: 09/13/2010
  • Issued: 06/11/2013
  • Est. Priority Date: 09/11/2009
  • Status: Expired due to Fees
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First Claim
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1. A serially stacked shunt semiconductor on insulator (SOI) switch comprising:

  • a plurality of field effect transistor (FET) devices, where each FET device of the plurality of FET devices includes a gate contact, a drain contact, and a source contact, and such that the plurality of FET devices are coupled in series to form a chain having a first drain at a first end of the chain, a first source coupled at a second end of the chain, and wherein the gate contact of the FET device at the second end of the chain is a first gate contact;

    a plurality of gate biasing circuits coupled in series, wherein each of the plurality of gate biasing circuits is coupled between a corresponding pair of gate contacts of the plurality of FET devices;

    a common biasing circuit having a first terminal and a second terminal, wherein the first terminal is coupled to the first gate contact;

    a plurality of drain-source circuits coupled in series, wherein each of the plurality of drain-source circuits is coupled between a corresponding drain contact and source contact of one of the plurality of FET devices; and

    a plurality of drain-source speedup circuits, wherein each drain-source speedup circuit of the plurality of drain-source speedup circuits is coupled across a corresponding drain-source circuit of the plurality of drain-source circuits.

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