Universal digital block interconnection and channel routing
First Claim
Patent Images
1. An apparatus, comprising:
- a plurality of digital blocks arranged into one or more pairs;
a programmable interconnect matrix including a first set of routing channels that programmably couple at least the two digital blocks of the one or more pairs together and segmentation elements that programmably interconnect two or more of the first set of routing channels together; and
a micro-controller system programmably coupled to the plurality of digital blocks and to one or more Inputs/Outputs (I/Os) through the programmable interconnect matrix.
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Abstract
A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O.
360 Citations
22 Claims
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1. An apparatus, comprising:
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a plurality of digital blocks arranged into one or more pairs; a programmable interconnect matrix including a first set of routing channels that programmably couple at least the two digital blocks of the one or more pairs together and segmentation elements that programmably interconnect two or more of the first set of routing channels together; and a micro-controller system programmably coupled to the plurality of digital blocks and to one or more Inputs/Outputs (I/Os) through the programmable interconnect matrix. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method, comprising:
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programming an interconnect matrix to connect two or more functional elements to a first set of routing channels, wherein the two or more functional elements are arranged into one or more pairs, the pairs being coupled together through one or more of the first set of routing channels; programming the interconnect matrix to interconnect two or more of the first set of routing channels together; writing, by a micro-controller system, a first set of values into a configuration memory that control connections between the two or more functional elements and the first set of routing channels. - View Dependent Claims (13, 14, 15, 16, 17)
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18. An apparatus, comprising:
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a plurality of digital blocks arranged into one or more pairs; a programmable interconnect matrix including a first set of routing channels that programmably couple at least the two digital blocks of the one or more pairs together and segmentation elements that programmably interconnect two or more of the first set of routing channels together; and a micro-controller system programmably coupled to the plurality of digital blocks, to at least one Input/Output (I/O), and a fixed function peripheral through the programmable interconnect matrix. - View Dependent Claims (19, 20, 21, 22)
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Specification