Semiconductor device and driving method thereof, and electronic device
First Claim
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1. A semiconductor device comprising:
- a first transistor;
a second transistor;
a third transistor;
a fourth transistor;
a fifth transistor,a first capacitor; and
a second capacitor,wherein a gate of the first transistor is electrically connected to a first electrode of the first capacitor,wherein one of a source and a drain of the second transistor is electrically connected to the gate of the first transistor,wherein the other of the source and the drain of the second transistor is electrically connected to one of a source and a drain of the first transistor,wherein one of a source and a drain of the third transistor is electrically connected to a second electrode of the first capacitor,wherein the other of the source and the drain of the first transistor is electrically connected to a second wiring,wherein a first electrode of the second capacitor is electrically connected to the second electrode of the first capacitor,wherein one of a source and a drain of the fourth transistor is electrically connected to the one of the second capacitor,wherein the other of the source and the drain of the fourth transistor is electrically connected to a first wiring,wherein one of a source and a drain of the fifth transistor is electrically connected to the one of the source and the drain of the first transistor,wherein the other of the source and the drain of the fifth transistor is electrically connected to a pixel electrode, andwherein the first transistor comprises a channel portion comprising an oxide semiconductor.
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Abstract
A driving method of a semiconductor device for compensating variation in threshold voltage and mobility of a transistor is provided. A driving method of a semiconductor device including a transistor and a capacitor electrically connected to a gate of the transistor includes a first period where voltage corresponding to threshold voltage of the transistor is held in the capacitor, a second period where a total voltage of video signal voltage and threshold voltage is held in the capacitor holding the threshold voltage, and a third period where charge held in the capacitor in accordance with the total voltage of the video signal voltage and the threshold voltage in the second period is discharged through the transistor.
35 Citations
17 Claims
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1. A semiconductor device comprising:
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a first transistor; a second transistor; a third transistor; a fourth transistor; a fifth transistor, a first capacitor; and a second capacitor, wherein a gate of the first transistor is electrically connected to a first electrode of the first capacitor, wherein one of a source and a drain of the second transistor is electrically connected to the gate of the first transistor, wherein the other of the source and the drain of the second transistor is electrically connected to one of a source and a drain of the first transistor, wherein one of a source and a drain of the third transistor is electrically connected to a second electrode of the first capacitor, wherein the other of the source and the drain of the first transistor is electrically connected to a second wiring, wherein a first electrode of the second capacitor is electrically connected to the second electrode of the first capacitor, wherein one of a source and a drain of the fourth transistor is electrically connected to the one of the second capacitor, wherein the other of the source and the drain of the fourth transistor is electrically connected to a first wiring, wherein one of a source and a drain of the fifth transistor is electrically connected to the one of the source and the drain of the first transistor, wherein the other of the source and the drain of the fifth transistor is electrically connected to a pixel electrode, and wherein the first transistor comprises a channel portion comprising an oxide semiconductor. - View Dependent Claims (2, 3, 4, 7, 8, 9)
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5. A semiconductor device comprising:
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a transistor; a first capacitor wherein a first electrode of the first capacitor is electrically connected to a gate of the transistor; a second capacitor wherein a first electrode of the second capacitor is electrically connected to a second electrode of the first capacitor; a first switch configured to connect through an electric contact between the gate of the transistor and one of a source and a drain of the transistor; a second switch configured to connect through an electric contact between the other of the source and the drain of the transistor and the second electrode of the first capacitor; a third switch configured to connect through an electric contact between a first wiring and the first electrode of the second capacitor; a fourth switch configured to connect through an electric contact between a pixel electrode and the one of the source and the drain of the transistor, and wherein the transistor comprises a channel portion comprising an oxide semiconductor. - View Dependent Claims (6)
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10. A semiconductor device comprising:
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a first transistor; a second transistor; a third transistor; a fourth transistor; a fifth transistor, a sixth transistor; and a first capacitor, wherein a gate of the first transistor is electrically connected to a first electrode of the first capacitor, wherein one of a source and a drain of the second transistor is electrically connected to the gate of the first transistor, wherein the other of the source and the drain of the second transistor is electrically connected to one of a source and a drain of the first transistor, wherein one of a source and a drain of the third transistor is electrically connected to the other of the source and the drain of the first transistor, wherein one of a source and a drain of the fourth transistor is electrically connected to the other of the source and the drain of the first transistor, wherein the other of the source and the drain of the fourth transistor is electrically connected to a first wiring, wherein one of a source and a drain of the fifth transistor is electrically connected to the one of the source and the drain of the first transistor, and wherein the other of the source and the drain of the fifth transistor is electrically connected to a pixel electrode, and wherein one of a source and a drain of the sixth transistor is electrically connected to the gate of the first transistor. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
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Specification
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsKimura, Hajime
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Primary Examiner(s)Shankar, Vijay
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Application NumberUS12/712,479Publication NumberTime in Patent Office1,237 DaysField of Search345 76- 80, 345 90-100, 345204-215, 3151691-1694US Class Current345/212CPC Class CodesG09G 2300/0426 Layout of electrodes and co...G09G 2300/0819 used for counteracting unde...G09G 2300/0852 being a dynamic memory with...G09G 2300/0876 Supplementary capacities in...G09G 2310/0251 Precharge or discharge of p...G09G 2320/0233 Improving the luminance or ...G09G 2320/045 Compensation of drifts in t...G09G 2330/021 Power management, e.g. powe...G09G 3/22 using controlled light sourcesG09G 3/3233 with pixel circuitry contro...
