×

Circuit interrupter device with self-test function

  • US 8,513,964 B2
  • Filed: 11/09/2010
  • Issued: 08/20/2013
  • Est. Priority Date: 07/06/2010
  • Status: Active Grant
First Claim
Patent Images

1. A circuit interrupter device comprising:

  • a hot conducting circuit and a neutral conducting circuit for connecting to a power source;

    a fault detection circuit, coupled to the hot conducting circuit and the neutral conducting circuit, being responsive to at least a fault in the hot conducting circuit and the neutral conducting circuit to generate a first fault detection signal;

    a signal driving circuit, coupled to the fault detection circuit, being responsive to the first fault detection signal to generate a drive signal;

    a disconnecting mechanism, coupled to the signal driving circuit, for disconnecting an electrical connection in the hot conducting circuit and the neutral conducting circuit when the drive signal exceeds a predetermined level;

    a self-test circuit, coupled to the fault detection circuit and the signal driving circuit, for generating a self-test signal according to a predetermined time period and when an alternating current of the power source passes zero points, generating an evaluation result based on the self-test signal and a feedback signal of a second fault detection signal corresponding to the self-test signal, and generating one or more error signals if the evaluation result indicates a circuit error; and

    a device-state indicator circuit, coupled to the self-test circuit, for generating one or more alarms based on the one or more error signals;

    wherein the self-test circuit comprises;

    a zero-point sampling circuit, coupled to the hot conducting circuit and the neutral conducting circuit, for providing a zero-point sampling signal when the alternating current of the power source passes the zero points; and

    a self-test signal processing circuit, coupled to the zero-point sampling circuit and the fault detection circuit, for generating the self-test signal according to the predetermined time period and in response to the zero-point sampling signal, generating the evaluation result in response to the self-test signal and the feedback signal of the second fault detection signal corresponding to the self-test signal, and generating the one or more error signals based on the evaluation result that indicates the circuit error.

View all claims
  • 2 Assignments
Timeline View
Assignment View
    ×
    ×