Tightly coupled scalar and boolean processor with result vector subunit controlled by instruction flow
First Claim
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1. An apparatus comprising:
- a scalar unit;
a Boolean unit, the Boolean unit comprising a result vector subunit to store comparison result data in a result vector having a plurality of bits, wherein each bit in the result vector corresponds to a comparison operation or a Boolean operation on pairs of bits, wherein the result vector subunit is controlled by an instruction flow managed by the scalar unit;
a communication facility to couple the scalar and Boolean units; and
a condition code unit to capture a cumulative status of a plurality of operations,wherein a policy engine is to classify packets based on the comparison result data,wherein the policy engine is to perform bulk comparisons for a threshold number of cycles through suppression of interpretation of subsequent information during the threshold number of cycles.
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Abstract
Methods and apparatus relating to a tightly coupled scalar and Boolean processor are described. In an embodiment, a Boolean unit may include a result vector subunit. The result vector subunit may be controlled by an instruction flow that is managed by a scalar unit. Other embodiments are also disclosed.
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Citations
23 Claims
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1. An apparatus comprising:
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a scalar unit; a Boolean unit, the Boolean unit comprising a result vector subunit to store comparison result data in a result vector having a plurality of bits, wherein each bit in the result vector corresponds to a comparison operation or a Boolean operation on pairs of bits, wherein the result vector subunit is controlled by an instruction flow managed by the scalar unit; a communication facility to couple the scalar and Boolean units; and a condition code unit to capture a cumulative status of a plurality of operations, wherein a policy engine is to classify packets based on the comparison result data, wherein the policy engine is to perform bulk comparisons for a threshold number of cycles through suppression of interpretation of subsequent information during the threshold number of cycles. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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Specification