Accelerator for multi-processing system and method
First Claim
1. A processing system comprising:
- a plurality of processors configured to execute a plurality of threads and to support context switching; and
a hardware concurrency engine coupled to the plurality of processors, the concurrency engine configured to manage a plurality of concurrency primitives that coordinate execution of the threads by the plurality of processors,wherein each of the plurality of concurrency primitives comprises a concurrency object used to support various coordination functions performed by the concurrency engine; and
wherein the plurality of processors are configured to use the concurrency primitives by reading from and writing to addresses in an address space associated with the concurrency engine, wherein each address encodes an object index identifying one of the concurrency objects, an object type identifying a type associated with the identified concurrency object, and an operation type identifying a requested operation involving the identified concurrency object using bit variables.
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Accused Products
Abstract
A processing system includes a plurality of processors capable of executing a plurality of threads and supporting at least one of hardware context switching and software context switching. The processing system also includes a hardware concurrency engine coupled to the plurality of processors. The concurrency engine is capable of managing a plurality of concurrency primitives that coordinate execution of the threads by the processors. The concurrency primitives could represent objects, and the processors may be capable of using the objects by reading from and/or writing to addresses in an address space associated with the concurrency engine. Each address may encode an object index identifying one of the objects, an object type identifying a type associated with the identified object, and an operation type identifying a requested operation involving the identified object.
35 Citations
28 Claims
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1. A processing system comprising:
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a plurality of processors configured to execute a plurality of threads and to support context switching; and a hardware concurrency engine coupled to the plurality of processors, the concurrency engine configured to manage a plurality of concurrency primitives that coordinate execution of the threads by the plurality of processors, wherein each of the plurality of concurrency primitives comprises a concurrency object used to support various coordination functions performed by the concurrency engine; and wherein the plurality of processors are configured to use the concurrency primitives by reading from and writing to addresses in an address space associated with the concurrency engine, wherein each address encodes an object index identifying one of the concurrency objects, an object type identifying a type associated with the identified concurrency object, and an operation type identifying a requested operation involving the identified concurrency object using bit variables. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method comprising:
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executing a plurality of threads using a plurality of processors that support context switching; managing a plurality of concurrency primitives that coordinate execution of the threads by the plurality of processors using a hardware concurrency engine coupled to the plurality of processors; and reading from and writing, the plurality of processors, to addresses in an address space associated with the concurrency engine to use the concurrency primitives, wherein each of the plurality of concurrency primitives comprises a concurrency object used to support various coordination functions performed by the concurrency engine; and wherein each address encodes an object index identifying one of the concurrency objects, an object type identifying a type associated with the identified concurrency object, and an operation type identifying a requested operation involving the identified concurrency object using bit variables. - View Dependent Claims (13, 14, 15, 16, 17, 18)
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19. A hardware concurrency engine configured to manage a plurality of concurrency primitives that coordinate execution of threads by a plurality of processors, the concurrency engine comprising:
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a command decoder configured to decode requests from the plurality of processors; a command processor configured to execute operations associated with the decoded requests; a response formatter configured to encode results from the execution of the operations; and a memory configured to store information associated with a plurality of concurrency objects that represents the concurrency primitives and support various coordination functions performed by the concurrency engine, each operation executed by the command processor involving at least one of the concurrency objects, each request from the plurality of processors to use the concurrency primitives comprising at least one of a read operation and a write operation involving an address in an address space associated with the concurrency engine, the address encoding an object index identifying one of the concurrency objects, an object type identifying a type associated with the identified concurrency object, and an operation type identifying a requested operation involving the identified concurrency object using bit variables. - View Dependent Claims (20, 21)
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22. An apparatus comprising:
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at least one of;
an input device and an interface to the input device, the input device configured to provide input data;at least one of;
an output device and an interface to the output device, the output device operable to receiving output data; anda processing system configured to receive the input data and to generate the output data, the processing system comprising; a plurality of processors configured to execute a plurality of threads; and a hardware concurrency engine coupled to the plurality of processors, the concurrency engine configured to manage a plurality of concurrency primitives that coordinate execution of the threads by the plurality of processors, wherein the concurrency engine comprises a memory configured to store information associated with a plurality of concurrency objects that represents the concurrency primitives and support various coordinating functions performed by the concurrency engine, each operation executed by the plurality of processors involving at least one of the concurrency objects, each request from the plurality of processors to use the concurrency primitives comprising at least one of a read operation and a write operation involving an address in an address space associated with the concurrency engine, the address encoding an object index identifying one of the concurrency objects, an object type identifying a type associated with the identified concurrency object, and an operation type identifying a requested operation involving the identified concurrency object using bit variables. - View Dependent Claims (23, 24, 25, 26)
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27. A processor comprising:
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an instruction set supporting a plurality of instructions for execution; an embedded memory configured to store instructions to be executed, the instructions to be executed implementing at least one thread; and a hardware concurrency engine configured to manage a plurality of concurrency primitives that coordinate execution of a plurality of threads by the processor and at least one additional processor, wherein each of the plurality of concurrency primitives comprises a concurrency object used to support various coordination functions performed by the concurrency engine; and wherein the processor is configured to use the concurrency primitives by reading from and writing to addresses in an address space associated with the concurrency engine, each address encoding an object index identifying one of the concurrency objects, an object type identifying a type associated with the identified concurrency object, and an operation type identifying a requested operation involving the identified concurrency object using bit variables. - View Dependent Claims (28)
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Specification