Defective memory block remapping method and system, and memory device and processor-based system using same
First Claim
1. A method of addressing a memory, comprising:
- receiving an input address for access to the memory;
determining a number of non-functional memory blocks between an initial address of the memory and the input address;
incrementing the input address by the number of non-functional memory blocks to yield an output address; and
accessing the memory using the output address.
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Accused Products
Abstract
A non-volatile memory device includes a block remapping system that offsets an input block address by the addresses of non-functional blocks to provide an output block address that is used to address the memory device. The system generates the output block addresses by, in effect, adding to the input block address the addresses of all non-functional blocks of memory that are between an initial address and the output block address. The system performs this function be comparing the input block address to the address of any defective block. If the address of the defective block is less than or equal to the input block address, the addresses of all defective blocks starting at the block address are added to the input block address. The system then iteratively performs this process using each output block address generated by the system in place of the input block address.
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Citations
20 Claims
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1. A method of addressing a memory, comprising:
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receiving an input address for access to the memory; determining a number of non-functional memory blocks between an initial address of the memory and the input address; incrementing the input address by the number of non-functional memory blocks to yield an output address; and accessing the memory using the output address. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of replacing bad memory blocks of an array, comprising:
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mapping addresses for the bad memory blocks in the array to next available good memory blocks in the array; and storing the addresses and respective sizes of the bad memory blocks in the array, the stored addresses and respective sizes of the bad memory blocks used in calculating remapped block addresses for the next available good memory blocks in the array. - View Dependent Claims (8, 9, 10, 11)
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12. A memory, comprising:
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an array of memory blocks; programmable memory configured to be programmed with addresses of bad memory blocks of the array and further configured to be programmed with respective sizes of bad memory blocks; a remapping circuit coupled to the programmable memory and configured to determine a number of bad memory blocks between a memory block to which an input address is mapped and an initial block of memory and further configured to calculate a remapped address for the input address to access the memory block to which the input address is mapped based, at least in part, on the programmed addresses and respective sizes. - View Dependent Claims (13, 14, 15, 16, 17)
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18. A memory, comprising:
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redundancy fuse sets configured to be programmed with block addresses for non functional memory blocks and block sizes for the non-functional memory blocks; a comparator coupled to the redundancy fuse sets and configured to compare an input block address with the block addresses programmed in the redundancy fuse sets; an adder configured to add to the input block address the block sizes for non-functional memory blocks having addresses not greater than the input block address to provide a mapped block address; and an address decoder coupled to the adder and configured to access a memory block corresponding to the mapped block address. - View Dependent Claims (19, 20)
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Specification