Nonvolatile memory devices

• US 8,625,351 B2
• Filed: 11/07/2011
• Issued: 01/07/2014
• Est. Priority Date: 12/23/2010
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Park, Jongyeol
• Primary Examiner(s): King, Douglas
• Application Number:
  US13/290,687
• Publication Number:
  US 20120163081A1
• Time in Patent Office: 792 Days
• Field of Search: 365/185.17, 365/185.09, 365/185.11, 365/104, 365/185.18
• US Class Current: 365/185.17
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits

Abstract

Nonvolatile memory devices including a memory cell array with a plurality of memory blocks and a plurality of bit lines arranged at the memory cell array. Each of the plurality of memory blocks may include a plurality of strings arranged in rows and columns and formed to be vertical to a substrate. Strings of each row of each memory block are connected with the bit lines, respectively, and strings of each column of each memory block are connected in common with a corresponding one of the bit lines. One memory block of the plurality of memory blocks includes a first region for storing ROM data and a second region for storing replica ROM data for repairing the ROM data.

Claims

1. A nonvolatile memory device, comprising:

a memory cell array including a plurality of memory blocks on a substrate, each of the plurality of memory blocks including strings arranged in rows and columns,

the strings including a plurality of memory cells stacked vertical on each other and on the substrate,

the plurality of memory blocks including at least one memory block including a read-only-memory (ROM) data region and a replica ROM data region,

the ROM data region including first strings of one first row of the rows in the one memory block,

the replica ROM data region including second strings of one second row of the rows in the one memory block,

the first row being different than the second row,

the plurality of memory cells in each of the first strings being connected with word lines,

the word lines including two first word lines and a plurality of second word lines; and

a plurality of bit lines connected to the memory cell array, strings of each of the rows connected with the bit lines, and strings of each of the columns connected in common with a corresponding one of the bit lines, wherein

the nonvolatile memory device is configured to store ROM data in memory cells connected to the two first word lines, and to maintain memory cells connected to the second word lines in an erase state, and

the nonvolatile memory device is configured to, at a read operation, drive the two first word lines using a ground voltage, drive word lines of the second word lines that are adjacent to the two first word lines using a voltage higher than a read voltage, and drive the second word lines other than the adjacent second word lines using the read voltage.

2. The nonvolatile memory device of claim 1, wherein the nonvolatile memory device is configured to execute read and program operations on the first strings independently from the second strings.

3. The nonvolatile memory device of claim 1, wherein at least one of the second word lines is between the two first word lines.

4. The data storage device of claim 1, wherein the memory cells connected to the two first word lines include:

a first group of memory cells at a first height that are connected to one of the two first word lines, and

a second group of memory cells at a second height that are connected to an other of the two first word lines.

5. The data storage device of claim 4, wherein at least one of the second word lines is between the two first word lines.

6. A data storage device, comprising:

a nonvolatile memory device including a memory cell array with a plurality of memory blocks on a substrate, each of the plurality of memory blocks including a plurality of strings arranged in rows and columns,

the strings including a plurality of memory cells stacked vertical on each other and on the substrate,

the plurality of memory blocks including at least one memory block including a read-only-memory ROM data region and a replica ROM data region,

the ROM data region including first strings of one first row of the rows in the one memory block,

the replica ROM data region including second strings of one second row of the rows in the one memory block,

the first row being different than the second row,

the plurality of memory cells in each of the first strings being connected with word lines,

the word lines including two first word lines and a plurality of second word lines;

a plurality of bit lines connected to the memory cell array, strings of each of the rows are connected with the bit lines, and strings of each of the columns are connected in common with a corresponding one of the bit lines; and

a control logic configured to control the nonvolatile memory device, wherein

the nonvolatile memory device is configured to store ROM data in memory cells connected to the two first word lines, and to maintain memory cells connected to the second word lines in an erase state, and

the nonvolatile memory device is configured to, at a read operation, drive the two first word lines using a ground voltage, drive word lines of the second word lines that are adjacent to the two first word lines using a voltage higher than a read voltage, and drive the second word lines other than the adjacent second word lines using the read voltage.

7. The data storage device of claim 6, wherein

strings of each of the rows are connected with the bit lines, and

strings of each of the columns are connected in common with a corresponding one of the bit lines.

8. The data storage device of claim 7, wherein the nonvolatile memory device is configured to execute read and program operations on the first strings independently from the second strings.

9. The data storage device of claim 8, wherein at least one of the second word lines is between the two first word lines.

10. A solid state drive comprising:

the data storage device of claim 6; and

a controller connected with the data storage device via a plurality of channels.

11. The solid state drive of claim 10, wherein

strings of the plurality of strings in each row are connected with the bit lines, and

strings of the plurality of strings in each column are connected in common with a corresponding one of the bit lines.

12. The solid state drive of claim 11, wherein each of the nonvolatile memory devices are configured to execute read and program operations on the first strings independently from the second strings.

13. The solid state drive of claim 12, wherein

each of the nonvolatile memory devices are configured to store ROM data in memory cells connected to the two first word lines, and to maintain an erase state in memory cells connected to the second word lines, and

at least one of the second word lines is between the two first word lines.

14. The data storage device of claim 6, wherein the memory cells connected to the two first word lines include:

a first group of memory cells at a first height that are connected to one of the two first word lines, and

a second group of memory cells at a second height that are connected to an other of the two first word lines.

15. The data storage device of claim 14, wherein at least one of the second word lines is between the two first word lines.

16. A nonvolatile memory device, comprising:

memory block configured to store read-only-memory (ROM) data and replica ROM data,

the one memory block including a plurality of memory cell strings arranged in rows and columns,

each of the memory cell strings including at least three vertically stacked memory cells that are each connected to a word line,

the memory block being configured to store read-only-memory (ROM) data in memory cells connected to two first word lines in a first row among the rows of memory cell strings of the memory block,

the memory block being configured to maintain an erase state in memory cells connected to second word lines in the first row among the rows of memory cell strings,

the memory block being configured to store replica ROM data in a second row among the rows of memory cell strings of the memory block,

the first row and the second row being different,

wherein the nonvolatile memory device is configured to, at a read operation,

drive the two first word lines using a ground voltage,

drive word lines of the second word lines that are adjacent to the two first word lines using a voltage higher than a read voltage, and

drive the second word lines other than the adjacent second word lines using the read voltage.

17. The nonvolatile memory device of claim 16, wherein

the memory block is one of a plurality of memory blocks in a memory cell array.

18. The nonvolatile memory device of claim 17, wherein the nonvolatile memory device is configured to read and repair the ROM data using only the one memory block.

19. The data storage device of claim 16, wherein at least one of the second word lines is between the two first word lines.

20. The data storage device of claim 16, wherein the memory cells connected to the two first word lines include:

a first group of memory cells at a first height that are connected to one of the two first word lines, and

a second group of memory cells at a second height that are connected to an other of the two first word lines.

21. The data storage device of claim 20, wherein at least one of the second word lines is between the two first word lines.