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Semiconductor memory device

  • US 8,732,466 B2
  • Filed: 06/15/2012
  • Issued: 05/20/2014
  • Est. Priority Date: 12/02/2011
  • Status: Active Grant
First Claim
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1. A host device which can execute an authentication process with a memory device provided with a first area where read is restricted and readable second area and third area, whereinthe host device has first key data recorded as a set and is configured to:

  • read encrypted secret data stored in the second area;

    decrypt the encrypted secret data with family key data obtained based on family key block data read from the third area;

    read key index data stored in the second area and select, from the set, the first key data corresponding to the key index data;

    generate session key data by executing an AES (Advanced Encryption Standard) encryption process with number data and the selected first key data;

    execute a conversion process using a one-way function with, as input values, the session key data and secret data generated by decrypting the encrypted secret data to thereby generate verification data; and

    execute a conversion process using a one-way function with the secret data as an input value to thereby generate EMID.

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